From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 78B55A00C4; Thu, 20 Jan 2022 10:51:41 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 125E7426D9; Thu, 20 Jan 2022 10:51:41 +0100 (CET) Received: from mail-io1-f51.google.com (mail-io1-f51.google.com [209.85.166.51]) by mails.dpdk.org (Postfix) with ESMTP id D553440042 for ; Thu, 20 Jan 2022 10:51:39 +0100 (CET) Received: by mail-io1-f51.google.com with SMTP id h23so6186465iol.11 for ; Thu, 20 Jan 2022 01:51:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=T/0iv4SemkyUtzPR5ZmzvdfztwhiKwUTmJL4T1ebd+M=; b=VeWdKLs1eQ0MSWcLD2nXMrYbNSIvAeVhAo9jnZOGnQ7psohuldYrEnp0q55HCAyacx s3Ak4a+Os718BIc7bsB2kbwbOkyPSEYIWZTIZb7Sk5V9oXWvstUz/DhJtIkutMZP7qDf w6Fs3obMc9n3dua+y6DDHepNMP9KbLzSipUlH/ip8UFoQNFaxtiGDQswDApPyjIhrcql eAuZxM/ntIgnkYtd6PPIlQD+V5XGQ+ggSNjF23x5ONxFYguYH/QO0VOFa1G6+Cu4GZqh N84dX0kTyFkcHLez6K1PmWr//5VgIV9NtF8dXDZS2U9sP8Zw6rSfZwxfUjmM0YzMi0b/ /Y+g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=T/0iv4SemkyUtzPR5ZmzvdfztwhiKwUTmJL4T1ebd+M=; b=XIHbK7feYPmngbBQZnJfRaQmD/A7SmNITU1HJTHo1giqiFU24M/2CPSOwTkdG8MnLU Ic+UILppJafCzgnVdmCai1H7izrqbmkgDnx1rNLtVyyjni4ynBxk1jRF17vOoMUfUm2J 5vO8MGyGH1uqdFm2DqsYidLlAkAmCeNRG0KWqlUjD84Hi/Jr0RM6PrkRYpH83CChwwa5 mnPXbcSTL4ujFdnvRHXz3YFEQZCI2aD9kHNB59ITaZVAAb2Mqfs+xniPuWrK+lOe+FMr flMy51FNXV1+Oz+ayk+3ZYHEJYlwfd4YwQh3G7puAVoBMRG5NPfBDQTheCTHudA76A6s QcRg== X-Gm-Message-State: AOAM531dP8IHH0FZlWGgLvw1XK6ksd2a7t2sPcVG7xAk3VlUMqrQSK14 HxQ0HeN4QhtpatzMMchBCvH6nDP0DHSgPoUdiZE= X-Google-Smtp-Source: ABdhPJwjKivOiDDGvv4LaOramu+F1tUmqhzBZ+ks5SO5MpdEytAxu/NPJLwLOhxAkQWbyG5WkmzqagkBMDoBncGr+S8= X-Received: by 2002:a02:bb87:: with SMTP id g7mr91747jan.79.1642672299163; Thu, 20 Jan 2022 01:51:39 -0800 (PST) MIME-Version: 1.0 References: <20211213110615.4458-1-pbhagavatula@marvell.com> In-Reply-To: From: Jerin Jacob Date: Thu, 20 Jan 2022 15:21:12 +0530 Message-ID: Subject: Re: [PATCH] config/cn10k: align mempool elements to 128 bytes To: Ruifeng Wang Cc: "pbhagavatula@marvell.com" , "jerinj@marvell.com" , Jan Viktorin , Bruce Richardson , "dev@dpdk.org" , nd Content-Type: text/plain; charset="UTF-8" X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On Tue, Dec 14, 2021 at 2:53 PM Ruifeng Wang wrote: > > > -----Original Message----- > > From: pbhagavatula@marvell.com > > Sent: Monday, December 13, 2021 7:06 PM > > To: jerinj@marvell.com; Jan Viktorin ; Ruifeng > > Wang ; Bruce Richardson > > > > Cc: dev@dpdk.org; Pavan Nikhilesh > > Subject: [PATCH] config/cn10k: align mempool elements to 128 bytes > > > > From: Pavan Nikhilesh > > > > Mempool elements are by default aligned to CACHELINE_SIZE. > > In CN10K cacheline size is 64B but the RoC requires buffers to be aligned to > > 128B. > > Set RTE_MEMPOOL_ALIGN to 128 to force mempool buffers to be aligned > > 128 bytes. > > > > Signed-off-by: Pavan Nikhilesh > > --- > > config/arm/meson.build | 3 ++- > > 1 file changed, 2 insertions(+), 1 deletion(-) > > > > diff --git a/config/arm/meson.build b/config/arm/meson.build index > > 213324d262..33afe1a9ad 100644 > > --- a/config/arm/meson.build > > +++ b/config/arm/meson.build > > @@ -276,7 +276,8 @@ soc_cn10k = { > > 'implementer' : '0x41', > > 'flags': [ > > ['RTE_MAX_LCORE', 24], > > - ['RTE_MAX_NUMA_NODES', 1] > > + ['RTE_MAX_NUMA_NODES', 1], > > + ['RTE_MEMPOOL_ALIGN', 128] > > ], > > 'part_number': '0xd49', > > 'extra_march_features': ['crypto'], > > -- > > 2.17.1 > > Reviewed-by: Ruifeng Wang Applied to dpdk-next-net-mrvl/for-next-net. Thanks Added Fixes: 1b4c86a721c9 ("config/arm: add Marvell CN10K") Cc: stable@dpdk.org >