From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id F22EF43193; Wed, 18 Oct 2023 06:31:17 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id DD6264025F; Wed, 18 Oct 2023 06:31:17 +0200 (CEST) Received: from mail-qt1-f180.google.com (mail-qt1-f180.google.com [209.85.160.180]) by mails.dpdk.org (Postfix) with ESMTP id 1C6324003C for ; Wed, 18 Oct 2023 06:31:16 +0200 (CEST) Received: by mail-qt1-f180.google.com with SMTP id d75a77b69052e-41cb76f3cf0so5292761cf.2 for ; Tue, 17 Oct 2023 21:31:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1697603475; x=1698208275; darn=dpdk.org; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=NGRjhoUD2Fizda9qlpwTQjG21suAjyoOC2IOqsiS82k=; b=FoWi1S2BNQvVLqoa3aaOlVhx/nJwBXgGeWs1fjvX6GcLDzORbIEFl7OOMTISRHPr/1 CR9TP7Ab4ZO9DJfHwWlfxYcTT8/jiGqeOEqS/GYe87QBRwiu+kHe3S3FhTm5nL04fMXu 2Pn6leGiKaM13vbUlWcOOrziDwiPhYmd7UVA/OEZtm6yjTEoIfClofL4iSWFQJK0HACh du42umnCjryuYs8xFHfu5lCyorHSA+MGmYJM0IVczvwFTsMB7VTRLptjXm0iBnxC9rNH 5Xq2Pj26hNtxO+z/3//3GwnDX12Mil+hfDa4ilBVYL+nYHpZ41sH96sGdP24oWyUaCIJ Lsww== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697603475; x=1698208275; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=NGRjhoUD2Fizda9qlpwTQjG21suAjyoOC2IOqsiS82k=; b=W3R4vh6rhdX6zepQwxuJrEW66ZocWxdshVdV/RH2w8wE3K73TbrkSt+vuycQ3h/dNt KHrcNjfdefheICYMiwIIflgOFflFVAyJipLDtp7tUH+eFaiM7UeFKMiTm4waneWHvJ07 hE78uT+WtgL2SL4JdHA132t3g+bLz0BCRfyCU6wcFt1u3ijEbW9LN5XXaqjkGDo8APvI 7uCOG5Lqsm8JuoqZgtewZjgmMAu+RioPF9HtvAhoyTDCmGCyto3gDNnB1SZgGM69Fd7G jRpybIPSPe1JJrSOFTNmSTTcJNFkaNBWjClG05aTPy33IE78Kk9IfAB8bvOy3xf2GFYd cQgg== X-Gm-Message-State: AOJu0Yx0O1KXU/2/4PacKhXf5VZ/g/CRwh0ut5jxYoOEBhAVEfwGgidT 6Fb9dJSfcAcuq900lL8S4en3pvs349JNDgLxmho= X-Google-Smtp-Source: AGHT+IHP8+GHM+WoMcRq6uJE7z5HftbeFxi1ZPeZdR/HS+dE0TBcul0EdPD/H0/7RlLeosTjOj/ZbXqLoi1tpIUjyVg= X-Received: by 2002:a05:622a:38f:b0:418:1e88:83ca with SMTP id j15-20020a05622a038f00b004181e8883camr5030086qtx.40.1697603475382; Tue, 17 Oct 2023 21:31:15 -0700 (PDT) MIME-Version: 1.0 References: <20231013163548.2226503-1-asekhar@marvell.com> In-Reply-To: <20231013163548.2226503-1-asekhar@marvell.com> From: Jerin Jacob Date: Wed, 18 Oct 2023 10:00:49 +0530 Message-ID: Subject: Re: [PATCH] common/cnxk: fix pool buffer size in opaque mode To: Ashwin Sekhar T K Cc: dev@dpdk.org, Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao , jerinj@marvell.com, pbhagavatula@marvell.com, psatheesh@marvell.com, anoobj@marvell.com, gakhil@marvell.com, hkalra@marvell.com, Kommula Shiva Shankar Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On Fri, Oct 13, 2023 at 10:06=E2=80=AFPM Ashwin Sekhar T K wrote: > > From: Kommula Shiva Shankar > > Pool buffer size in opaque mode must always be set to 0. > > Fixes: f765f5611240 ("common/cnxk: add NPA pool HW operations") > > Signed-off-by: Kommula Shiva Shankar > Signed-off-by: Ashwin Sekhar T K Applied to dpdk-next-net-mrvl/for-next-net. Thanks > --- > drivers/common/cnxk/roc_npa.c | 6 +++++- > 1 file changed, 5 insertions(+), 1 deletion(-) > > diff --git a/drivers/common/cnxk/roc_npa.c b/drivers/common/cnxk/roc_npa.= c > index b76b8e2342..6c14c49901 100644 > --- a/drivers/common/cnxk/roc_npa.c > +++ b/drivers/common/cnxk/roc_npa.c > @@ -517,7 +517,11 @@ npa_aura_pool_pair_alloc(struct npa_lf *lf, const ui= nt32_t block_size, > /* Update pool fields */ > pool->stack_base =3D mz->iova; > pool->ena =3D 1; > - pool->buf_size =3D block_size / ROC_ALIGN; > + /* In opaque mode buffer size must be 0 */ > + if (!pool->nat_align) > + pool->buf_size =3D 0; > + else > + pool->buf_size =3D block_size / ROC_ALIGN; > pool->stack_max_pages =3D stack_size; > pool->shift =3D plt_log2_u32(block_count); > pool->shift =3D pool->shift < 8 ? 0 : pool->shift - 8; > -- > 2.25.1 >