From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm0-f67.google.com (mail-wm0-f67.google.com [74.125.82.67]) by dpdk.org (Postfix) with ESMTP id 2898110C8F for ; Wed, 21 Dec 2016 16:38:43 +0100 (CET) Received: by mail-wm0-f67.google.com with SMTP id l2so5617632wml.2 for ; Wed, 21 Dec 2016 07:38:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:sender:in-reply-to:references:from:date:message-id :subject:to:cc; bh=3maOrG2hVs6hDXTQ4mn2orn3TLy73nxXlECIahBZoKc=; b=u+IrLllpZuWw3xP0KCuC9D19tuB6ChVDxulXedi9G+wq4452b2gSaawTGqdz/DS0Df NMw1ddwM3TYsGDbk72bDYErhwYrGezV0PPF9Pv9YPof8f1/HwAi2LNLqcV2inoL8cM2x Dev9iNrXLgAuqWMFd+xX3/+1IaMeNXYe6Ojiuu6DSlDfdyyQI1K2yE6q0gjHZSjhblip w/CjREWz4Hz7E2Bq5Mkx0XxHHuCqvXSy4lbzfjw5HHiuN3yOqUm7uzWYr5gc+MXy0G3r X7J5WpswBTOnRNXdlZahYfwTGHYuXP7Ks/tC/TGr1UW+NGOJADNqXkweZiMOyqgxGbTa +m0Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:sender:in-reply-to:references:from :date:message-id:subject:to:cc; bh=3maOrG2hVs6hDXTQ4mn2orn3TLy73nxXlECIahBZoKc=; b=Gr9BYJVZSxDu9PsDdfgWVzIePE0x7ig92PIfY+fQLVw4/dxiWCazE5YKZrn3yML9jO 41Y7KGtmT+4ZB9w+f1cEarmnBYzhZW3m38wQSjDt7x0cjpmN1/Lb2JvsELzRtwnb1Owz qJuoxbhW4OcQs+ourjhM9ICIHtC3TUOyFyUE9R6I842zBUAFwK2mm4wWB+dK2oRlH/Wf Ti7lxmvQ5iabS2tXMoBmyQOuGYZEPlyNBlYqhsntvE0lkMZPRikCvgd1F1k2Rf7+VQAb qtFoQl1lyN2i7XJEh2khK3Ivsg40EAN7uotQ6lWwXEUlYriPlf7N2UjshI1A5pBHZg4y VsSw== X-Gm-Message-State: AIkVDXLSQUnTHI0uX5USPZqW43g06q8lYFKOlEcdSAp81hnqTCGNy05J58Lz3w2iYqAVrOm5w3cWKh5V0XAw5A== X-Received: by 10.28.158.82 with SMTP id h79mr7236970wme.19.1482334722815; Wed, 21 Dec 2016 07:38:42 -0800 (PST) MIME-Version: 1.0 Sender: jblunck@gmail.com Received: by 10.28.63.83 with HTTP; Wed, 21 Dec 2016 07:38:42 -0800 (PST) In-Reply-To: <20161220091156.4442cb07@xeon-e3> References: <1481636232-2300-1-git-send-email-shreyansh.jain@nxp.com> <1481893853-31790-1-git-send-email-shreyansh.jain@nxp.com> <1481893853-31790-3-git-send-email-shreyansh.jain@nxp.com> <20161220091156.4442cb07@xeon-e3> From: Jan Blunck Date: Wed, 21 Dec 2016 16:38:42 +0100 X-Google-Sender-Auth: xCj_po3GHJp8O7Rneujlm-oBUZ8 Message-ID: To: Stephen Hemminger Cc: Shreyansh Jain , dev@dpdk.org, David Marchand , Thomas Monjalon , Ferruh Yigit , jianbo.liu@linaro.org Content-Type: text/plain; charset=UTF-8 Subject: Re: [dpdk-dev] [PATCH v3 02/12] eal/bus: introduce bus abstraction X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 21 Dec 2016 15:38:43 -0000 On Tue, Dec 20, 2016 at 6:11 PM, Stephen Hemminger wrote: > On Tue, 20 Dec 2016 14:17:14 +0100 > Jan Blunck wrote: > >> On Fri, Dec 16, 2016 at 2:10 PM, Shreyansh Jain wrote: >> > This patch introduces the rte_bus abstraction for devices and drivers in >> > EAL framework. The model is: >> > - One or more buses are connected to a CPU (or core) >> > - One or more devices are conneted to a Bus >> > - Drivers are running instances which manage one or more devices >> > - Bus is responsible for identifying devices (and interrupt propogation) >> > - Driver is responsible for initializing the device >> > >> > This patch adds a 'rte_bus' class which rte_driver and rte_device refer. >> > This way, each device (rte_xxx_device) would have reference to the bus >> > it is based on. As well as, each driver (rte_xxx_driver) would have link >> > to the bus and devices on it for servicing. >> > >> > __ rte_bus_list >> > / >> > +----------'---+ >> > |rte_bus | >> > | driver_list------> List of rte_bus specific >> > | device_list---- devices >> > | | `-> List of rte_bus associated >> > | | drivers >> > +--|------|----+ >> > _________/ \_________ >> > +--------/----+ +-\---------------+ >> > |rte_device | |rte_driver | >> > | rte_bus | | rte_bus | >> > | rte_driver | | ... | >> > | ... | +---------...-----+ >> > | | ||| >> > +---||--------+ ||| >> > || ||| >> > | \ \\\ >> > | \_____________ \\\ >> > | \ ||| >> > +------|---------+ +----|----------+ ||| >> > |rte_pci_device | |rte_xxx_device | ||| >> > | .... | | .... | ||| >> > +----------------+ +---------------+ / | \ >> > / | \ >> > _____________________/ / \ >> > / ___/ \ >> > +-------------'--+ +------------'---+ +--'------------+ >> > |rte_pci_driver | |rte_vdev_driver | |rte_xxx_driver | >> > | .... | | .... | | .... | >> > +----------------+ +----------------+ +---------------+ >> > >> > This patch only enables the bus references on rte_driver and rte_driver. >> > EAL wide global device and driver list continue to exist until an instance >> > of bus is added in subsequent patches. >> > >> > This patch also introduces RTE_REGISTER_BUS macro on the lines of >> > RTE_PMD_REGISTER_XXX. Key difference is that the constructor priority has >> > been explicitly set to 101 so as to execute bus registration before PMD. >> > >> > Signed-off-by: Shreyansh Jain >> > > > Ok, but let's keep this as bus type not bus. It gets really hard and complex > to enumerate all layers of PCI bus and bridges. As far as I understand it this isn't the intention to replicate the hierarchy of buses we have in the kernel. The PCI bus in this case becomes a list of PCI devices.