Hi Ferruh,

Yes, there will probably be next versions in the future. If you don't mind making the marker length adjustment, that would be great.

Regarding MBUF (re)sizing  - Arkville supports the ability to configure or reconfigure the MBUF size used on a per-queue basis. This feature is useful when the are conflicting motivations for using smaller/larger MBUF sizes. For example, user can switch a queue to use a size best for that queue's application workload.

-Shep


On Mon, Feb 13, 2023 at 10:46 AM Ferruh Yigit <ferruh.yigit@amd.com> wrote:
On 2/13/2023 2:58 PM, Shepard Siegel wrote:
> Add detail for the existing Arkville configurations FX0 and FX1.
> Corrected minor errors of omission.
>
> Signed-off-by: Shepard Siegel <shepard.siegel@atomicrules.com>
> ---
>  doc/guides/nics/ark.rst | 18 ++++++++++++++++++
>  1 file changed, 18 insertions(+)
>
> diff --git a/doc/guides/nics/ark.rst b/doc/guides/nics/ark.rst
> index ba00f14e80..edaa02dc96 100644
> --- a/doc/guides/nics/ark.rst
> +++ b/doc/guides/nics/ark.rst
> @@ -52,6 +52,10 @@ board. While specific capabilities such as number of physical
>  hardware queue-pairs are negotiated; the driver is designed to
>  remain constant over a broad and extendable feature set.
> 
> +* FPGA Vendors Supported: AMD/Xilinx and Intel
> +* Number of RX/TX Queue-Pairs: up to 128
> +* PCIe Endpoint Technology: Gen3, Gen4, Gen5
> +
>  Intentionally, Arkville by itself DOES NOT provide common NIC
>  capabilities such as offload or receive-side scaling (RSS).
>  These capabilities would be viewed as a gate-level "tax" on
> @@ -303,6 +307,18 @@ ARK PMD supports the following Arkville RTL PCIe instances including:
>  * ``1d6c:101e`` - AR-ARKA-FX1 [Arkville 64B DPDK Data Mover for Agilex R-Tile]
>  * ``1d6c:101f`` - AR-TK242 [2x100GbE Packet Capture Device]
> 
> +Arkville RTL Core Configurations
> +-------------------------------------
> +

The title marker length (-) should be same as title length, can you
please fix if there will be next version, if not I can fix while merging.


> +Arkville's RTL core may be configured by the user with different
> +datapath widths to balance throughput against FPGA logic area. The ARK PMD
> +has introspection on the RTL core configuration and acts accordingly.
> +All Arkville configurations present identical RTL user-facing AXI stream
> +interfaces for both AMD/Xilinx and Intel FPGAs.
> +
> +* ARK-FX0 - 256-bit 32B datapath (PCIe Gen3, Gen4)
> +* ARK-FX1 - 512-bit 64B datapath (PCIe Gen3, Gen4, Gen5)
> +
>  DPDK and Arkville Firmware Versioning
>  -------------------------------------
> 
> @@ -334,6 +350,8 @@ Supported Features
>  ------------------
> 
>  * Dynamic ARK PMD extensions
> +* Dynamic per-queue MBUF (re)sizing up to 32KB

What is this feature? What does it mean to size/resize mbuf dynamically?

> +* SR-IOV, VF-based queue-segregation
>  * Multiple receive and transmit queues
>  * Jumbo frames up to 9K
>  * Hardware Statistics