From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 69B5D41C8B; Mon, 13 Feb 2023 18:32:05 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 4460041151; Mon, 13 Feb 2023 18:32:05 +0100 (CET) Received: from mail-ej1-f51.google.com (mail-ej1-f51.google.com [209.85.218.51]) by mails.dpdk.org (Postfix) with ESMTP id 8B11340EE4 for ; Mon, 13 Feb 2023 18:32:03 +0100 (CET) Received: by mail-ej1-f51.google.com with SMTP id sa10so33665277ejc.9 for ; Mon, 13 Feb 2023 09:32:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=atomicrules-com.20210112.gappssmtp.com; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=s9RUksP/0VhwjjyaFZXu2+Bkp21SLwbKgHMnNi5bkGQ=; b=23w9E9iHVNpdLzx3Ts4tcBKwCoNbnTWzJk8pOEyA/ncqlsjmOQpQqNMwhK5HancwMM ufXxXiZO20v3gqZHJei3BnpCdIqvq9PI+zzS3g2/x7wFqHppN6sgK2j/NCOn3v+QOVig /Cixpkxcih4D3SMyUAgPOlFvOM35eSkc0szxI9nkdnDo2h29HicFIhJZzdT8J4c1j1U7 ncvk6SbcNkNUajCbqAGZEKOAnrnLDXjHxIu61Xyl5+MKdYT0Dl/wmvSwhTrWyKrx1EpV M75x+K5yy7Ev71EqAwuE2KdU+IOi3km64MfpfAacRuHZbaWcPB5K0S50Rcq0TJqa3mQF uhUA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=s9RUksP/0VhwjjyaFZXu2+Bkp21SLwbKgHMnNi5bkGQ=; b=ygS3rysfts2Avmcjk6mJrsYVnBBpM+VmSCxmsifjQ/yzXX+6EUdolaB4vQScQcckPq 49wpoD3w33GmA8Y3xv8GXh7xsbltyTK9Rry6+YP8upA2qlMRgwEArGgg9VZjQCxATuyi Zq0TClv4j12wz7txKmr8SwI+hWguh/ToIjeIodmKmWBGSsoSGUE1DrPTWy/uD9sgyaap JvdmXZfxBHvBqPjJhEHEd4N0fGTc8rPQzdPXNjlkovHyTGK5ioPjaBpeGF5uHfqSag04 db+1Dj6SMisKzhi1p45/J8S0P1lihmCbvH0oPJfMljCCzjPzd5SVB1S25I9RiO019kXQ BpZQ== X-Gm-Message-State: AO0yUKWTJAPz95acKLEhR5YJuKR7dm98BdoLAlfbYGnwMlf4yMmWk3e7 OqaZWSRHwXgac2HPFkhanN+9W5t9dGmgypWdLkE9GY+3VrWcdw== X-Google-Smtp-Source: AK7set9ESvHtMixPhqL30jYTJ073T8lLvjOX8aQnNPPhZ10k0c0sy+6qdoSjfUgvN4doJqt3n8Giowdsxp2tjdnQApo= X-Received: by 2002:a17:906:6991:b0:879:5db8:8bb2 with SMTP id i17-20020a170906699100b008795db88bb2mr5011051ejr.7.1676309523249; Mon, 13 Feb 2023 09:32:03 -0800 (PST) MIME-Version: 1.0 References: <20230211141459.2857045-1-shepard.siegel@atomicrules.com> <20230213145824.2886910-1-shepard.siegel@atomicrules.com> <72b463ec-e7c1-a751-adac-6896b7f992d4@amd.com> In-Reply-To: <72b463ec-e7c1-a751-adac-6896b7f992d4@amd.com> From: Shepard Siegel Date: Mon, 13 Feb 2023 12:31:52 -0500 Message-ID: Subject: Re: [PATCH 1/4] doc: clarify the existing net/ark guide To: Ferruh Yigit Cc: ed.czeck@atomicrules.com, dev@dpdk.org Content-Type: multipart/alternative; boundary="000000000000aad2ad05f4983985" X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org --000000000000aad2ad05f4983985 Content-Type: text/plain; charset="UTF-8" Yes, what is different here is that the MBUF size is communicated from the PMD to the hardware which *changes its behavior* of data motion to optimize throughput and latency as a function of that setting. And it does that per-queue. And can be done at runtime (that's the dynamic part). ... To the best our knowledge, other PMDs use this as a host-software setting only - and their DPDK naive DMA engines just use the same fixed settings (respecting PCIe, of course). Hope that helps. If it is contentious in any way, we are fine with removing that line. We added it as users have remarked it is a unique capability they think we should point out. -Shep On Mon, Feb 13, 2023 at 12:23 PM Ferruh Yigit wrote: > On 2/13/2023 5:09 PM, Shepard Siegel wrote: > > Hi Ferruh, > > > > Yes, there will probably be next versions in the future. If you don't > > mind making the marker length adjustment, that would be great. > > > > Regarding MBUF (re)sizing - Arkville supports the ability to configure > > or reconfigure the MBUF size used on a per-queue basis. This feature is > > useful when the are conflicting motivations for using smaller/larger > > MBUF sizes. For example, user can switch a queue to use a size best for > > that queue's application workload. > > > > Application can allocate multiple mempool with different sizes and set > these to specific queues, this is same for all PMDs, is ark PMD doing > something specific here? Or are you referring to something else? > > And what does 'dynamic' emphasis means here? > > > > -Shep > > > > > > On Mon, Feb 13, 2023 at 10:46 AM Ferruh Yigit > > wrote: > > > > On 2/13/2023 2:58 PM, Shepard Siegel wrote: > > > Add detail for the existing Arkville configurations FX0 and FX1. > > > Corrected minor errors of omission. > > > > > > Signed-off-by: Shepard Siegel > > > > > --- > > > doc/guides/nics/ark.rst | 18 ++++++++++++++++++ > > > 1 file changed, 18 insertions(+) > > > > > > diff --git a/doc/guides/nics/ark.rst b/doc/guides/nics/ark.rst > > > index ba00f14e80..edaa02dc96 100644 > > > --- a/doc/guides/nics/ark.rst > > > +++ b/doc/guides/nics/ark.rst > > > @@ -52,6 +52,10 @@ board. While specific capabilities such as > > number of physical > > > hardware queue-pairs are negotiated; the driver is designed to > > > remain constant over a broad and extendable feature set. > > > > > > +* FPGA Vendors Supported: AMD/Xilinx and Intel > > > +* Number of RX/TX Queue-Pairs: up to 128 > > > +* PCIe Endpoint Technology: Gen3, Gen4, Gen5 > > > + > > > Intentionally, Arkville by itself DOES NOT provide common NIC > > > capabilities such as offload or receive-side scaling (RSS). > > > These capabilities would be viewed as a gate-level "tax" on > > > @@ -303,6 +307,18 @@ ARK PMD supports the following Arkville RTL > > PCIe instances including: > > > * ``1d6c:101e`` - AR-ARKA-FX1 [Arkville 64B DPDK Data Mover for > > Agilex R-Tile] > > > * ``1d6c:101f`` - AR-TK242 [2x100GbE Packet Capture Device] > > > > > > +Arkville RTL Core Configurations > > > +------------------------------------- > > > + > > > > The title marker length (-) should be same as title length, can you > > please fix if there will be next version, if not I can fix while > > merging. > > > > > > > +Arkville's RTL core may be configured by the user with different > > > +datapath widths to balance throughput against FPGA logic area. > > The ARK PMD > > > +has introspection on the RTL core configuration and acts > accordingly. > > > +All Arkville configurations present identical RTL user-facing AXI > > stream > > > +interfaces for both AMD/Xilinx and Intel FPGAs. > > > + > > > +* ARK-FX0 - 256-bit 32B datapath (PCIe Gen3, Gen4) > > > +* ARK-FX1 - 512-bit 64B datapath (PCIe Gen3, Gen4, Gen5) > > > + > > > DPDK and Arkville Firmware Versioning > > > ------------------------------------- > > > > > > @@ -334,6 +350,8 @@ Supported Features > > > ------------------ > > > > > > * Dynamic ARK PMD extensions > > > +* Dynamic per-queue MBUF (re)sizing up to 32KB > > > > What is this feature? What does it mean to size/resize mbuf > dynamically? > > > > > +* SR-IOV, VF-based queue-segregation > > > * Multiple receive and transmit queues > > > * Jumbo frames up to 9K > > > * Hardware Statistics > > > > --000000000000aad2ad05f4983985 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
Yes, what is different here is that the MBUF size is commu= nicated from=C2=A0the PMD to the hardware which *changes its behavior* of d= ata motion to optimize=C2=A0throughput and latency as a function of that se= tting. And it does that=C2=A0per-queue. And can be done at runtime (that= 9;s the dynamic=C2=A0part). ... To the best our knowledge, other PMDs use t= his as a host-software setting only - and their DPDK naive=C2=A0DMA engines= just use the same fixed settings (respecting PCIe, of course).

Hope that helps. If it is contentious in any way, we are fine with = removing=C2=A0that line. We added it as users have remarked it is a unique = capability they think we should point out.

-Shep


On Mon, Feb 13, 2023 at 12:23 PM Ferruh Yigit <ferruh.yigit@amd.com> wrote:
On 2/13/2023 5:09 PM,= Shepard Siegel wrote:
> Hi Ferruh,
>
> Yes, there will probably be next versions in the future. If you don= 9;t
> mind making the marker length adjustment, that would be great.
>
> Regarding MBUF (re)sizing=C2=A0 - Arkville supports the=C2=A0ability t= o configure
> or reconfigure the MBUF size used on a per-queue basis. This feature= =C2=A0is
> useful when the are conflicting motivations for using smaller/larger > MBUF sizes. For example, user can switch a queue to use a size best fo= r
> that queue's=C2=A0application workload.
>

Application can allocate multiple mempool with different sizes and set
these to specific queues, this is same for all PMDs, is ark PMD doing
something specific here? Or are you referring to something else?

And what does 'dynamic' emphasis means here?


> -Shep
>
>
> On Mon, Feb 13, 2023 at 10:46 AM Ferruh Yigit <ferruh.yigit@amd.com
> <mailto:f= erruh.yigit@amd.com>> wrote:
>
>=C2=A0 =C2=A0 =C2=A0On 2/13/2023 2:58 PM, Shepard Siegel wrote:
>=C2=A0 =C2=A0 =C2=A0> Add detail for the existing Arkville configura= tions FX0 and FX1.
>=C2=A0 =C2=A0 =C2=A0> Corrected minor errors of omission.
>=C2=A0 =C2=A0 =C2=A0>
>=C2=A0 =C2=A0 =C2=A0> Signed-off-by: Shepard Siegel <shepard.siegel@atom= icrules.com
>=C2=A0 =C2=A0 =C2=A0<mailto:shepard.siegel@atomicrules.com>>
>=C2=A0 =C2=A0 =C2=A0> ---
>=C2=A0 =C2=A0 =C2=A0>=C2=A0 doc/guides/nics/ark.rst | 18 +++++++++++= +++++++
>=C2=A0 =C2=A0 =C2=A0>=C2=A0 1 file changed, 18 insertions(+)
>=C2=A0 =C2=A0 =C2=A0>
>=C2=A0 =C2=A0 =C2=A0> diff --git a/doc/guides/nics/ark.rst b/doc/gui= des/nics/ark.rst
>=C2=A0 =C2=A0 =C2=A0> index ba00f14e80..edaa02dc96 100644
>=C2=A0 =C2=A0 =C2=A0> --- a/doc/guides/nics/ark.rst
>=C2=A0 =C2=A0 =C2=A0> +++ b/doc/guides/nics/ark.rst
>=C2=A0 =C2=A0 =C2=A0> @@ -52,6 +52,10 @@ board. While specific capab= ilities such as
>=C2=A0 =C2=A0 =C2=A0number of physical
>=C2=A0 =C2=A0 =C2=A0>=C2=A0 hardware queue-pairs are negotiated; the= driver is designed to
>=C2=A0 =C2=A0 =C2=A0>=C2=A0 remain constant over a broad and extenda= ble feature set.
>=C2=A0 =C2=A0 =C2=A0>=C2=A0
>=C2=A0 =C2=A0 =C2=A0> +* FPGA Vendors Supported: AMD/Xilinx and Inte= l
>=C2=A0 =C2=A0 =C2=A0> +* Number of RX/TX Queue-Pairs: up to 128
>=C2=A0 =C2=A0 =C2=A0> +* PCIe Endpoint Technology: Gen3, Gen4, Gen5<= br> >=C2=A0 =C2=A0 =C2=A0> +
>=C2=A0 =C2=A0 =C2=A0>=C2=A0 Intentionally, Arkville by itself DOES N= OT provide common NIC
>=C2=A0 =C2=A0 =C2=A0>=C2=A0 capabilities such as offload or receive-= side scaling (RSS).
>=C2=A0 =C2=A0 =C2=A0>=C2=A0 These capabilities would be viewed as a = gate-level "tax" on
>=C2=A0 =C2=A0 =C2=A0> @@ -303,6 +307,18 @@ ARK PMD supports the foll= owing Arkville RTL
>=C2=A0 =C2=A0 =C2=A0PCIe instances including:
>=C2=A0 =C2=A0 =C2=A0>=C2=A0 * ``1d6c:101e`` - AR-ARKA-FX1 [Arkville = 64B DPDK Data Mover for
>=C2=A0 =C2=A0 =C2=A0Agilex R-Tile]
>=C2=A0 =C2=A0 =C2=A0>=C2=A0 * ``1d6c:101f`` - AR-TK242 [2x100GbE Pac= ket Capture Device]
>=C2=A0 =C2=A0 =C2=A0>=C2=A0
>=C2=A0 =C2=A0 =C2=A0> +Arkville RTL Core Configurations
>=C2=A0 =C2=A0 =C2=A0> +-------------------------------------
>=C2=A0 =C2=A0 =C2=A0> +
>
>=C2=A0 =C2=A0 =C2=A0The title marker length (-) should be same as title= length, can you
>=C2=A0 =C2=A0 =C2=A0please fix if there will be next version, if not I = can fix while
>=C2=A0 =C2=A0 =C2=A0merging.
>
>
>=C2=A0 =C2=A0 =C2=A0> +Arkville's RTL core may be configured by = the user with different
>=C2=A0 =C2=A0 =C2=A0> +datapath widths to balance throughput against= FPGA logic area.
>=C2=A0 =C2=A0 =C2=A0The ARK PMD
>=C2=A0 =C2=A0 =C2=A0> +has introspection on the RTL core configurati= on and acts accordingly.
>=C2=A0 =C2=A0 =C2=A0> +All Arkville configurations present identical= RTL user-facing AXI
>=C2=A0 =C2=A0 =C2=A0stream
>=C2=A0 =C2=A0 =C2=A0> +interfaces for both AMD/Xilinx and Intel FPGA= s.
>=C2=A0 =C2=A0 =C2=A0> +
>=C2=A0 =C2=A0 =C2=A0> +* ARK-FX0 - 256-bit 32B datapath (PCIe Gen3, = Gen4)
>=C2=A0 =C2=A0 =C2=A0> +* ARK-FX1 - 512-bit 64B datapath (PCIe Gen3, = Gen4, Gen5)
>=C2=A0 =C2=A0 =C2=A0> +
>=C2=A0 =C2=A0 =C2=A0>=C2=A0 DPDK and Arkville Firmware Versioning >=C2=A0 =C2=A0 =C2=A0>=C2=A0 ------------------------------------- >=C2=A0 =C2=A0 =C2=A0>=C2=A0
>=C2=A0 =C2=A0 =C2=A0> @@ -334,6 +350,8 @@ Supported Features
>=C2=A0 =C2=A0 =C2=A0>=C2=A0 ------------------
>=C2=A0 =C2=A0 =C2=A0>=C2=A0
>=C2=A0 =C2=A0 =C2=A0>=C2=A0 * Dynamic ARK PMD extensions
>=C2=A0 =C2=A0 =C2=A0> +* Dynamic per-queue MBUF (re)sizing up to 32K= B
>
>=C2=A0 =C2=A0 =C2=A0What is this feature? What does it mean to size/res= ize mbuf dynamically?
>
>=C2=A0 =C2=A0 =C2=A0> +* SR-IOV, VF-based queue-segregation
>=C2=A0 =C2=A0 =C2=A0>=C2=A0 * Multiple receive and transmit queues >=C2=A0 =C2=A0 =C2=A0>=C2=A0 * Jumbo frames up to 9K
>=C2=A0 =C2=A0 =C2=A0>=C2=A0 * Hardware Statistics
>

--000000000000aad2ad05f4983985--