From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-lb0-f179.google.com (mail-lb0-f179.google.com [209.85.217.179]) by dpdk.org (Postfix) with ESMTP id 18FAD5A44 for ; Wed, 1 Jul 2015 15:40:45 +0200 (CEST) Received: by lbcpe5 with SMTP id pe5so13063692lbc.2 for ; Wed, 01 Jul 2015 06:40:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; bh=9JO/Q4yMuFsCn9mzba2o+3h8wMNbJq7mcgMofYFhdKc=; b=xKnBebU3uW7CUKkYjynSdTvxUIZNVcf3d7J4vKziPv9VLdmZ6QSu160bGkwi+ZkI8j KOZm/u5GD9KE8JQ0WdP7061H9bDnC1NqExAqRWD+9b78e2UiaT4baqoNWbkZQuy5MYA5 t7t2iak4HOnrK7lNy8xmmyxhTbJUa5FwV/FblWryxVWf9uqdzmSPZa1W6Gb+kA7hEIp6 Jw4ZlIDyitTc2ZbMju69P2UjhhkXNOi/rBOOxcCg9qLyUN+4dA7oS7K7uiyh4iemaXzn VL9WuywKB9vaxKYWOFyRHvscx+hxhtX2xHE6R2NnOIthOfJctw/b4Z01G2gPmHrnYpco vYvw== MIME-Version: 1.0 X-Received: by 10.112.155.103 with SMTP id vv7mr25058597lbb.75.1435758044733; Wed, 01 Jul 2015 06:40:44 -0700 (PDT) Received: by 10.114.10.229 with HTTP; Wed, 1 Jul 2015 06:40:44 -0700 (PDT) In-Reply-To: References: <20150701125918.GA6960@bricha3-MOBL3> Date: Wed, 1 Jul 2015 16:40:44 +0300 Message-ID: From: Vladimir Medvedkin To: Pavel Odintsov Content-Type: text/plain; charset=UTF-8 X-Content-Filtered-By: Mailman/MimeDel 2.1.15 Cc: "dev@dpdk.org" Subject: Re: [dpdk-dev] Could not achieve wire speed for 40GE with any DPDK version on XL710 NIC's X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 01 Jul 2015 13:40:45 -0000 In case with syn flood you should take into account return syn-ack traffic, which generates PCIe DLLP's from NIC to host, thus pcie bandwith exceeds faster. And don't forget about DLLP's generated by rx traffic, which saturates host-to-NIC bus. 2015-07-01 16:05 GMT+03:00 Pavel Odintsov : > Yes, Bruce, we understand this. But we are working with huge SYN > attacks processing and they are 64byte only :( > > On Wed, Jul 1, 2015 at 3:59 PM, Bruce Richardson > wrote: > > On Wed, Jul 01, 2015 at 03:44:57PM +0300, Pavel Odintsov wrote: > >> Thanks for answer, Vladimir! So we need look for x16 NIC if we want > >> achieve 40GE line rate... > >> > > Note that this would only apply for your minimal i.e. 64-byte, packet > sizes. > > Once you go up to larger e.g. 128B packets, your PCI bandwidth > requirements > > are lower and you can easier achieve line rate. > > > > /Bruce > > > >> On Wed, Jul 1, 2015 at 3:06 PM, Vladimir Medvedkin < > medvedkinv@gmail.com> wrote: > >> > Hi Pavel, > >> > > >> > Looks like you ran into pcie bottleneck. So let's calculate xl710 rx > only > >> > case. > >> > Assume we have 32byte descriptors (if we want more offload). > >> > DMA makes one pcie transaction with packet payload, one descriptor > writeback > >> > and one memory request for free descriptors for every 4 packets. For > >> > Transaction Layer Packet (TLP) there is 30 bytes overhead (4 PHY + 6 > DLL + > >> > 16 header + 4 ECRC). So for 1 rx packet dma sends 30 + 64(packet > itself) + > >> > 30 + 32 (writeback descriptor) + (16 / 4) (read request for new > >> > descriptors). Note that we do not take into account PCIe ACK/NACK/FC > Update > >> > DLLP. So we have 160 bytes per packet. One lane PCIe 3.0 transmits 1 > byte in > >> > 1 ns, so x8 transmits 8 bytes in 1 ns. 1 packet transmits in 20 ns. > Thus > >> > in theory pcie 3.0 x8 may transfer not more than 50mpps. > >> > Correct me if I'm wrong. > >> > > >> > Regards, > >> > Vladimir > >> > > >> > > > > > -- > Sincerely yours, Pavel Odintsov >