From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-yw0-f176.google.com (mail-yw0-f176.google.com [209.85.161.176]) by dpdk.org (Postfix) with ESMTP id BE7155922 for ; Fri, 23 Sep 2016 12:41:31 +0200 (CEST) Received: by mail-yw0-f176.google.com with SMTP id u82so110692338ywc.2 for ; Fri, 23 Sep 2016 03:41:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=7u7r2NLhmFnhYhbiPxrPXr7E8MX/ZAINUhEh7QiEF0g=; b=ap6ZLUZ1YI72RNfF6tTy2g8RzZlCc1d5lap8KiFYGh1XtlFXI5esQzUvlN1ao76d58 Zo5nQVtcwaedng1RsEjQowgfdX4P+LFEtEIhx/5YAAYZGMXh6AAEp8yWOmdbudF7qFva bOA5N/fFTBQMNE340OvrquaBWJRPkhOwZUgrI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=7u7r2NLhmFnhYhbiPxrPXr7E8MX/ZAINUhEh7QiEF0g=; b=FdJBkjGe/vJHHGmyTWAFcBA0NIID6R3DvSQiaVpamd/pqE1vamVVi0hFOVFo+1DMYY 1KDnfx6/Q7jDIpE4G1P5yNxpcqCXgTGUWi7Rn5oQeXGvD2Krum2h7kKZrpDT0EECxkf5 Iknp8WSGhkZ+AJ0ajDCWmpwMr2dSD3bjyXVuTqmhgME04ktS7Pwvp0Pptb1gJTOP9dLr 8wq0HPRp8AqUaSzyvXfOZIEXZysviAtMHifGkiroyTpamieDMlM/xSkYxOLE2P9+XEiZ cxJhK49Gv2n2Iea9eyecBlWd3ci0vS66RQjyOYNHP6KXsiSWXo401Od2PXnAw7bVvsG+ QuUQ== X-Gm-Message-State: AE9vXwOpPYOMtSivAMMHOHXrx4duywz6/JctIKxJoH2awMeTe68GIrviMnH1I+aHec1yirC+r3vHdQ5WpSZarEPI X-Received: by 10.129.167.193 with SMTP id e184mr5412407ywh.60.1474627291195; Fri, 23 Sep 2016 03:41:31 -0700 (PDT) MIME-Version: 1.0 Received: by 10.37.25.6 with HTTP; Fri, 23 Sep 2016 03:41:30 -0700 (PDT) In-Reply-To: <8F6C2BD409508844A0EFC19955BE09414E7B6204@SHSMSX103.ccr.corp.intel.com> References: <1471319402-112998-1-git-send-email-zhihong.wang@intel.com> <1471585430-125925-1-git-send-email-zhihong.wang@intel.com> <8F6C2BD409508844A0EFC19955BE09414E7B5581@SHSMSX103.ccr.corp.intel.com> <20160922022903.GJ23158@yliu-dev.sh.intel.com> <8F6C2BD409508844A0EFC19955BE09414E7B5DAE@SHSMSX103.ccr.corp.intel.com> <8F6C2BD409508844A0EFC19955BE09414E7B5ED5@SHSMSX103.ccr.corp.intel.com> <8F6C2BD409508844A0EFC19955BE09414E7B6204@SHSMSX103.ccr.corp.intel.com> From: Jianbo Liu Date: Fri, 23 Sep 2016 18:41:30 +0800 Message-ID: To: "Wang, Zhihong" Cc: Yuanhan Liu , Maxime Coquelin , "dev@dpdk.org" Content-Type: text/plain; charset=UTF-8 Subject: Re: [dpdk-dev] [PATCH v3 0/5] vhost: optimize enqueue X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 23 Sep 2016 10:41:32 -0000 On 23 September 2016 at 10:56, Wang, Zhihong wrote: ..... > This is expected because the 2nd patch is just a baseline and all optimization > patches are organized in the rest of this patch set. > > I think you can do bottleneck analysis on ARM to see what's slowing down the > perf, there might be some micro-arch complications there, mostly likely in > memcpy. > > Do you use glibc's memcpy? I suggest to hand-crafted it on your own. > > Could you publish the mrg_rxbuf=on data also? Since it's more widely used > in terms of spec integrity. > I don't think it will be helpful for you, considering the differences between x86 and arm. So please move on with this patchset... Thanks! Jianbo