From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2383D43B45; Mon, 19 Feb 2024 04:01:01 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 11EF9402B8; Mon, 19 Feb 2024 04:01:01 +0100 (CET) Received: from NAM10-MW2-obe.outbound.protection.outlook.com (mail-mw2nam10on2063.outbound.protection.outlook.com [40.107.94.63]) by mails.dpdk.org (Postfix) with ESMTP id E5D204029B for ; Mon, 19 Feb 2024 04:00:58 +0100 (CET) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=Etj5WU/G8bsPaUW8A8j5OvXpW54BdL6YAfKeyGuiFZEix2C/dfUMaJmMc2l8wgMQ+Lk2+RoKNkh9a6sjIEVU0hlwp4P8zf7bGZWDFunu1YhrF2qdHv5MvXhlor+74DUEnw7LymlrufnMusHjbXek4mQJXeGnV6qGSlB/t5PSzCeLGa0feEiAPy5mAMim1SiiO+6VrfEnxmSLqF/2wbWWIh5YxoWDJ4/y++6vFDHbYoTXbmdSVE09fu+tZcKQyfOkPcUQW/iAG3TxkUgS/LzflhvOl43LjDVCHBUzJ7jjvGJsAMofIoN2iOUjRyJ1aBFWW+GAXXMcLW9oU+iXypWPtw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=G/KofQs/qWqJJAN7nbXC1rHvDZzvkXEuy+ayr18wcMQ=; b=jxNmhZdkKD3VRB0P80j+oqSVAf/Qos1/Vj7E1NIbEENjuftiAABTPjEm0ixhYzPUWwSWEtQuY8gPvtTwB1eFeIgtR/Y8hRyCoYe8FXZTntR3G2CExmsy7fu6FlIXBjNsieObDhVpdn1fligidm8FCcs88NPDm1fpYByzWmlNQtc4lhbBU344NLkYJSP+1ijBr2ZILr4fl7CLWHki4hRdNQCFAh8kUuNuMUNLocCSNCSLnI7PTjOlrunU+ojn/YLhGBQPyr0ZrelYAKWuilPrtGx/ikaNOm+9CNFEMpIHb+5rQ1Pg+3YX2spZov9eAhYpFb8I2w/qWEuuY/oh3kbKXA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nvidia.com; dmarc=pass action=none header.from=nvidia.com; dkim=pass header.d=nvidia.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=G/KofQs/qWqJJAN7nbXC1rHvDZzvkXEuy+ayr18wcMQ=; b=Gb0oPZP9aUcTlbJXADaJB3NlHAIocyzwhljbA04IIUiMsv7fCc13rsP8SNe82WMOQXEhgclApZIKHVRjyHXs+ZKYiJ1YD+XkSfNmIUKeI/KXhWgP3KQT7+BdRLjFrmde/13OyczH3nSmQp/3ipW+xM9CTD6A4z8nB0jMmljfjEyJFH3JGvvhFZ0cMXD0w56uvpsUXKAZqoYgFm785gAOP9N8OQwrS7A1fkzVcdbQCeo3eHhclzSc9zVKyrR/7yIOb7F0GMhQ0SAPZgf/FqA5gLihC5HfU5bvGOfQ26ZmlDq+jt2j0wZ+udYVs5usgCsF1Sz61eXjxs1sBFRastn0eg== Received: from CO6PR12MB5396.namprd12.prod.outlook.com (2603:10b6:303:139::8) by BN9PR12MB5339.namprd12.prod.outlook.com (2603:10b6:408:104::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7316.19; Mon, 19 Feb 2024 03:00:55 +0000 Received: from CO6PR12MB5396.namprd12.prod.outlook.com ([fe80::32de:b509:fcd0:ee34]) by CO6PR12MB5396.namprd12.prod.outlook.com ([fe80::32de:b509:fcd0:ee34%2]) with mapi id 15.20.7316.016; Mon, 19 Feb 2024 03:00:55 +0000 From: Suanming Mou To: Michael Baum , "dev@dpdk.org" CC: Matan Azrad , Dariusz Sosnowski , Raslan Darawsheh , Slava Ovsiienko , Ori Kam , Hamdan Agbariya Subject: RE: [PATCH v5 1/3] net/mlx5/hws: add support for compare matcher Thread-Topic: [PATCH v5 1/3] net/mlx5/hws: add support for compare matcher Thread-Index: AQHaXxe89ub4lIdxNEqHaDaNgULTELERAVNQ Date: Mon, 19 Feb 2024 03:00:55 +0000 Message-ID: References: <20240207161414.1583125-1-michaelba@nvidia.com> <20240214073015.2060103-1-michaelba@nvidia.com> <20240214073015.2060103-2-michaelba@nvidia.com> In-Reply-To: <20240214073015.2060103-2-michaelba@nvidia.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nvidia.com; x-ms-publictraffictype: Email x-ms-traffictypediagnostic: CO6PR12MB5396:EE_|BN9PR12MB5339:EE_ x-ms-office365-filtering-correlation-id: 9641a903-7409-48d4-81ac-08dc30f6fdc9 x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: n/XObqcoOgUdeQfA3S84FURvmjiGQsPX/qx05Lr2I1FA6zqGb3r3I9Ft6/EgDCoCFjIZEMDhbW3kP+sim09hHO33jMRlLDKhSK9+8gfJRwy7Vdu3egxwWkHAY7WtE2FxYFavWHCyYuOwxFIEdS7MNFTDC9h9rNapp3/YBC5ioNVrdse16LXQqEC4+xh6kVLAcj3iVOuBcP3m504xRoCopw9raRZNEH1vsLBbU8/vyyJw3iw5O2W0FFsrqcGKnF/ucNRmkwsVaTd9EcyP0ww2tgJH2Evnr12RExUxImOCKR78j+NegSxFv8NKg5TK3xxdhKuv1fKiYfHrgu7M+oZLD39BzIoieEscf9Uy+DIAEKhKxYLEDonKTU6+5emvkOK3EAZT8xvY37Lljw2SrUWOCM/XYdNfYRkyhI94LhoSEwcV8t5NfZDujhuHLMONHnD51jmaVUh6kaMECdEDd+cFktujeiphk9kfFGs+dB8FCrjHi9fNTeI/3O8J1OIUdcv85X76kcx9Nk5aBl4rz1he+Ay8M4zoiIKTyjvGe4ACUm5e3LHPaKR0KPEeURyxVUjSMsN/AQMBbNHgIr5o2pTnpfEzKZhUFgIymxb75P2gjnYwfV5ZlEvZ5xx10hahK0Mn x-forefront-antispam-report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:CO6PR12MB5396.namprd12.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230031)(376002)(396003)(136003)(39860400002)(346002)(366004)(230922051799003)(186009)(64100799003)(451199024)(1800799012)(30864003)(66476007)(5660300002)(66446008)(4326008)(64756008)(76116006)(2906002)(66946007)(52536014)(66556008)(55016003)(8936002)(122000001)(86362001)(38100700002)(33656002)(38070700009)(83380400001)(8676002)(110136005)(71200400001)(316002)(26005)(9686003)(7696005)(478600001)(41300700001)(54906003)(6506007)(53546011)(107886003)(579004)(559001); DIR:OUT; SFP:1101; x-ms-exchange-antispam-messagedata-chunkcount: 1 x-ms-exchange-antispam-messagedata-0: =?us-ascii?Q?WO/jmtEtZyxUH2tnf3REmLbml/2jJgB1xt+HQwQHD3tHpdrXahTODtYPGj+K?= =?us-ascii?Q?NQxunwYYoeq6QpjeQSZ8qKwQ4WlrvE43B/U3/4n5XWJUXz8Qc+74gGC9B7Gu?= =?us-ascii?Q?C20OYsCeg7c6ertrEaBKoYadNsYYrVU9JGC1UKRoQcX/Y574ESMreoQ7ZiMU?= =?us-ascii?Q?dsNbKukM7CnH6IcXIMWo3Pl7ac18C4k4Fk6jmaXyb5uRefDd14ZhKhUjUp3D?= =?us-ascii?Q?Tndfz2wjxYba/c7oxapKtPlZlMSsZYgLlmnmcW6HJOJr+9Y3r2ASqX3+35GL?= =?us-ascii?Q?Q1L84i2ZONKdI1Z23Y5A24Re9f1Zg8w3YkqpCOsvqiwB7aAfGkcM/txGCZKi?= =?us-ascii?Q?ahthC+ldchQD1Mkb1xy7RKFdR9D/M/DB2DPMXByVLExvkBXNfvacpRmGu+Mw?= =?us-ascii?Q?gQzyhiN2/kP/9z/WXeAzkXqbvQRW3+b4EjhGLjvijI2JKo5qoc3pyLrY6uky?= =?us-ascii?Q?omqp2n5U2oOZShnM3B9llAREVwihGFVzA0792B1KC4NhgtF24nxiBdA2S4Jc?= =?us-ascii?Q?wKld4/Ajl9Z+uvJ5kwW67x01vXGbTR30UqfbU0ahp4TYWXt6MoFrwBAgFkG7?= =?us-ascii?Q?YylZoaihMyBaHO8ewsiIyICVD5MZaw0xdq4G4yaUM4KXkWEXYvNWt0L2E5Dk?= =?us-ascii?Q?CKv4xbf5QsYB4KhBJ0UfsK/w14Mvl7gBeZVyeqELysYmr3kV+Vt7uxx5N/WM?= =?us-ascii?Q?Y0QXA3mMotDn9IqGlMfUcqwflqUb7BgV0ttUvnUNGdqMd24wqaPX63eKu7m6?= =?us-ascii?Q?rPoz7zCtv7uOv6Pc4M4uLj53fgtDN/wTzKeXBZ2GdfFnnJqEoGMksOSnb9TK?= =?us-ascii?Q?ifblJykFvgQTQMG2KKJK7yuxNg+qCsMd3CHhp46rS1XKtDcxhCOK/OIPVhHW?= =?us-ascii?Q?j6fNJEKSO8AH1D6xPXqp+Y/D1AEcxOHRuk94Ddu8njZ3kUMoH8DpGnYBCJi4?= =?us-ascii?Q?6eb8CfPlEI5AyBAj0QOKLjwv6KDXvCXLatsIPv1/IAy/uj+NUC1Jp/L8dVei?= =?us-ascii?Q?3yD/Xw5VKGLDSvqyJ7sop4JTjkOuUqMtL6qJ5x6OMT4gs+Te4bJDP3uR6tzn?= =?us-ascii?Q?Gh0KJ/hcPZCaBF7weocDo2oiJTm3LNDW4IEGsX1VEux18OX334d+veSQrI5u?= =?us-ascii?Q?mNPBn+whGp/XRGerOs8GpurOX8EthdkVH7z0LXgp6V8FWh9Hn3mkNAZVQlmq?= =?us-ascii?Q?Qi33+x6SH2IPN6dSja2G32Be7gWUkFdh/eVF+FP+ebuIU5LvLMG717fH4QA3?= =?us-ascii?Q?JfsEBJmeIqeHzGDOqn0FhRbJiVeO9z0IDgq2DwTXKAWxQBCjnHT3d1CSC92/?= =?us-ascii?Q?pFwwx3TqH/2kCj+sNlt7qrq2UySjE8MApMHpQ6A7MD5/mbwFQ7rXS0Y94rcM?= =?us-ascii?Q?/DP341m0nrWCV9eGfVT06gLah/NHI1ZwDM9BqSZWVthuLEO71MrDb6j75AGm?= =?us-ascii?Q?FpET/vQk83uzHlb/sv4WM80at1ANyVSBItgVPPXlX1RxDXagTPLdNCIxrc24?= =?us-ascii?Q?qpaotW32WOUsZiUsA8/1cRLy7RgPXZXFZSGYb0k48N9Aq2mqLkuz0Myby8vB?= =?us-ascii?Q?VLMMfaIw+lGnQpDFiuXqighjOeRDGVtNGpaHovpX?= Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: CO6PR12MB5396.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 9641a903-7409-48d4-81ac-08dc30f6fdc9 X-MS-Exchange-CrossTenant-originalarrivaltime: 19 Feb 2024 03:00:55.7100 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: AuI8AstHgTyZ2TPUvcOMYBltKywkq2mPN2XbQbtpzz7GULyNmx0IH+NW9o/nFSKfeQRfHWAhPw5sZB+h79e38w== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN9PR12MB5339 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org > -----Original Message----- > From: Michael Baum > Sent: Wednesday, February 14, 2024 3:30 PM > To: dev@dpdk.org > Cc: Matan Azrad ; Dariusz Sosnowski > ; Raslan Darawsheh ; Slava > Ovsiienko ; Ori Kam ; Suanming > Mou ; Hamdan Igbaria > Subject: [PATCH v5 1/3] net/mlx5/hws: add support for compare matcher >=20 > From: Hamdan Igbaria >=20 > Add support for compare matcher, this matcher will allow direct compariso= n > between two packet fields, or a packet field and a value, with fully mask= ed DW. > For now this matcher hash table is limited to size 1x1, thus it supports = only 1 rule > STE. >=20 > Signed-off-by: Hamdan Igbaria > Signed-off-by: Michael Baum Acked-by: Suanming Mou > --- > drivers/common/mlx5/mlx5_prm.h | 16 ++ > drivers/net/mlx5/hws/mlx5dr_cmd.c | 9 +- > drivers/net/mlx5/hws/mlx5dr_cmd.h | 1 + > drivers/net/mlx5/hws/mlx5dr_debug.c | 4 +- > drivers/net/mlx5/hws/mlx5dr_debug.h | 1 + > drivers/net/mlx5/hws/mlx5dr_definer.c | 243 +++++++++++++++++++++++++- > drivers/net/mlx5/hws/mlx5dr_definer.h | 33 ++++ > drivers/net/mlx5/hws/mlx5dr_matcher.c | 48 +++++ > drivers/net/mlx5/hws/mlx5dr_matcher.h | 12 +- > 9 files changed, 358 insertions(+), 9 deletions(-) >=20 > diff --git a/drivers/common/mlx5/mlx5_prm.h > b/drivers/common/mlx5/mlx5_prm.h index 0035a1e616..f8956c8a87 100644 > --- a/drivers/common/mlx5/mlx5_prm.h > +++ b/drivers/common/mlx5/mlx5_prm.h > @@ -3459,6 +3459,7 @@ enum mlx5_ifc_rtc_ste_format { > MLX5_IFC_RTC_STE_FORMAT_8DW =3D 0x4, > MLX5_IFC_RTC_STE_FORMAT_11DW =3D 0x5, > MLX5_IFC_RTC_STE_FORMAT_RANGE =3D 0x7, > + MLX5_IFC_RTC_STE_FORMAT_4DW_RANGE =3D 0x8, > }; >=20 > enum mlx5_ifc_rtc_reparse_mode { > @@ -3497,6 +3498,21 @@ struct mlx5_ifc_rtc_bits { > u8 reserved_at_1a0[0x260]; > }; >=20 > +struct mlx5_ifc_ste_match_4dw_range_ctrl_dw_bits { > + u8 match[0x1]; > + u8 reserved_at_1[0x2]; > + u8 base1[0x1]; > + u8 inverse1[0x1]; > + u8 reserved_at_5[0x1]; > + u8 operator1[0x2]; > + u8 reserved_at_8[0x3]; > + u8 base0[0x1]; > + u8 inverse0[0x1]; > + u8 reserved_at_a[0x1]; > + u8 operator0[0x2]; > + u8 compare_delta[0x10]; > +}; > + > struct mlx5_ifc_alias_context_bits { > u8 vhca_id_to_be_accessed[0x10]; > u8 reserved_at_10[0xd]; > diff --git a/drivers/net/mlx5/hws/mlx5dr_cmd.c > b/drivers/net/mlx5/hws/mlx5dr_cmd.c > index 876a47147d..702d6fadac 100644 > --- a/drivers/net/mlx5/hws/mlx5dr_cmd.c > +++ b/drivers/net/mlx5/hws/mlx5dr_cmd.c > @@ -370,9 +370,12 @@ mlx5dr_cmd_rtc_create(struct ibv_context *ctx, > attr, obj_type, MLX5_GENERAL_OBJ_TYPE_RTC); >=20 > attr =3D MLX5_ADDR_OF(create_rtc_in, in, rtc); > - MLX5_SET(rtc, attr, ste_format_0, rtc_attr->is_frst_jumbo ? > - MLX5_IFC_RTC_STE_FORMAT_11DW : > - MLX5_IFC_RTC_STE_FORMAT_8DW); > + if (rtc_attr->is_compare) { > + MLX5_SET(rtc, attr, ste_format_0, > MLX5_IFC_RTC_STE_FORMAT_4DW_RANGE); > + } else { > + MLX5_SET(rtc, attr, ste_format_0, rtc_attr->is_frst_jumbo ? > + MLX5_IFC_RTC_STE_FORMAT_11DW : > MLX5_IFC_RTC_STE_FORMAT_8DW); > + } >=20 > if (rtc_attr->is_scnd_range) { > MLX5_SET(rtc, attr, ste_format_1, > MLX5_IFC_RTC_STE_FORMAT_RANGE); diff --git > a/drivers/net/mlx5/hws/mlx5dr_cmd.h b/drivers/net/mlx5/hws/mlx5dr_cmd.h > index 18c2b07fc8..073ffd9633 100644 > --- a/drivers/net/mlx5/hws/mlx5dr_cmd.h > +++ b/drivers/net/mlx5/hws/mlx5dr_cmd.h > @@ -82,6 +82,7 @@ struct mlx5dr_cmd_rtc_create_attr { > uint8_t reparse_mode; > bool is_frst_jumbo; > bool is_scnd_range; > + bool is_compare; > }; >=20 > struct mlx5dr_cmd_alias_obj_create_attr { diff --git > a/drivers/net/mlx5/hws/mlx5dr_debug.c > b/drivers/net/mlx5/hws/mlx5dr_debug.c > index 11557bcab8..a9094cd35b 100644 > --- a/drivers/net/mlx5/hws/mlx5dr_debug.c > +++ b/drivers/net/mlx5/hws/mlx5dr_debug.c > @@ -99,6 +99,7 @@ static int > mlx5dr_debug_dump_matcher_match_template(FILE *f, struct mlx5dr_matcher > *matcher) { > bool is_root =3D matcher->tbl->level =3D=3D MLX5DR_ROOT_LEVEL; > + bool is_compare =3D mlx5dr_matcher_is_compare(matcher); > enum mlx5dr_debug_res_type type; > int i, ret; >=20 > @@ -117,7 +118,8 @@ mlx5dr_debug_dump_matcher_match_template(FILE *f, > struct mlx5dr_matcher *matcher > return rte_errno; > } >=20 > - type =3D > MLX5DR_DEBUG_RES_TYPE_MATCHER_TEMPLATE_MATCH_DEFINER; > + type =3D is_compare ? > MLX5DR_DEBUG_RES_TYPE_MATCHER_TEMPLATE_COMPARE_MATCH_DEFINE > R : > + > MLX5DR_DEBUG_RES_TYPE_MATCHER_TEMPLATE_MATCH_DEFINER; > ret =3D mlx5dr_debug_dump_matcher_template_definer(f, mt, mt- > >definer, type); > if (ret) > return ret; > diff --git a/drivers/net/mlx5/hws/mlx5dr_debug.h > b/drivers/net/mlx5/hws/mlx5dr_debug.h > index 5cffdb10b5..a89a6a0b1d 100644 > --- a/drivers/net/mlx5/hws/mlx5dr_debug.h > +++ b/drivers/net/mlx5/hws/mlx5dr_debug.h > @@ -24,6 +24,7 @@ enum mlx5dr_debug_res_type { > MLX5DR_DEBUG_RES_TYPE_MATCHER_ACTION_TEMPLATE =3D 4204, > MLX5DR_DEBUG_RES_TYPE_MATCHER_TEMPLATE_HASH_DEFINER =3D > 4205, > MLX5DR_DEBUG_RES_TYPE_MATCHER_TEMPLATE_RANGE_DEFINER =3D > 4206, > + > MLX5DR_DEBUG_RES_TYPE_MATCHER_TEMPLATE_COMPARE_MATCH_ > DEFINER =3D 4207, > }; >=20 > static inline uint64_t > diff --git a/drivers/net/mlx5/hws/mlx5dr_definer.c > b/drivers/net/mlx5/hws/mlx5dr_definer.c > index 79d98bbf78..2d86175ca2 100644 > --- a/drivers/net/mlx5/hws/mlx5dr_definer.c > +++ b/drivers/net/mlx5/hws/mlx5dr_definer.c > @@ -383,6 +383,86 @@ mlx5dr_definer_ptype_frag_set(struct > mlx5dr_definer_fc *fc, > DR_SET(tag, !!packet_type, fc->byte_off, fc->bit_off, fc->bit_mask); } >=20 > +static void > +mlx5dr_definer_compare_base_value_set(const void *item_spec, > + uint8_t *tag) > +{ > + uint32_t *ctrl =3D &(((uint32_t > *)tag)[MLX5DR_DEFINER_COMPARE_STE_ARGUMENT_1]); > + uint32_t *base =3D &(((uint32_t > *)tag)[MLX5DR_DEFINER_COMPARE_STE_BASE_0]); > + const struct rte_flow_item_compare *v =3D item_spec; > + const struct rte_flow_field_data *a =3D &v->a; > + const struct rte_flow_field_data *b =3D &v->b; > + const uint32_t *value; > + > + value =3D (const uint32_t *)&b->value[0]; > + > + if (a->field =3D=3D RTE_FLOW_FIELD_RANDOM) > + *base =3D htobe32(*value << 16); > + else > + *base =3D htobe32(*value); > + > + MLX5_SET(ste_match_4dw_range_ctrl_dw, ctrl, base0, 1); } > + > +static void > +mlx5dr_definer_compare_op_translate(enum rte_flow_item_compare_op op, > + uint8_t *tag) > +{ > + uint32_t *ctrl =3D &(((uint32_t > *)tag)[MLX5DR_DEFINER_COMPARE_STE_ARGUMENT_1]); > + uint8_t operator =3D 0; > + uint8_t inverse =3D 0; > + > + switch (op) { > + case RTE_FLOW_ITEM_COMPARE_EQ: > + operator =3D 2; > + break; > + case RTE_FLOW_ITEM_COMPARE_NE: > + operator =3D 2; > + inverse =3D 1; > + break; > + case RTE_FLOW_ITEM_COMPARE_LT: > + inverse =3D 1; > + break; > + case RTE_FLOW_ITEM_COMPARE_LE: > + operator =3D 1; > + break; > + case RTE_FLOW_ITEM_COMPARE_GT: > + operator =3D 1; > + inverse =3D 1; > + break; > + case RTE_FLOW_ITEM_COMPARE_GE: > + break; > + default: > + DR_LOG(ERR, "Invalid operation type %d", op); > + assert(false); > + } > + > + MLX5_SET(ste_match_4dw_range_ctrl_dw, ctrl, inverse0, inverse); > + MLX5_SET(ste_match_4dw_range_ctrl_dw, ctrl, operator0, operator); } > + > +static void > +mlx5dr_definer_compare_arg_set(const void *item_spec, > + uint8_t *tag) > +{ > + const struct rte_flow_item_compare *v =3D item_spec; > + enum rte_flow_item_compare_op op =3D v->operation; > + > + mlx5dr_definer_compare_op_translate(op, tag); } > + > +static void > +mlx5dr_definer_compare_set(struct mlx5dr_definer_fc *fc, > + const void *item_spec, > + uint8_t *tag) > +{ > + if (fc->compare_idx =3D=3D MLX5DR_DEFINER_COMPARE_ARGUMENT_0) { > + mlx5dr_definer_compare_arg_set(item_spec, tag); > + if (fc->compare_set_base) > + mlx5dr_definer_compare_base_value_set(item_spec, > tag); > + } > +} > + > static void > mlx5dr_definer_integrity_set(struct mlx5dr_definer_fc *fc, > const void *item_spec, > @@ -2739,10 +2819,124 @@ mlx5dr_definer_conv_item_vxlan_gpe(struct > mlx5dr_definer_conv_data *cd, > return 0; > } >=20 > +static int > +mlx5dr_definer_conv_item_compare_field(const struct rte_flow_field_data = *f, > + const struct rte_flow_field_data *other_f, > + struct mlx5dr_definer_conv_data *cd, > + int item_idx, > + enum > mlx5dr_definer_compare_dw_selectors dw_offset) { > + struct mlx5dr_definer_fc *fc =3D NULL; > + int reg; > + > + if (f->offset) { > + DR_LOG(ERR, "field offset %u is not supported, only offset zero > supported", > + f->offset); > + goto err_notsup; > + } > + > + switch (f->field) { > + case RTE_FLOW_FIELD_META: > + reg =3D flow_hw_get_reg_id_from_ctx(cd->ctx, > + > RTE_FLOW_ITEM_TYPE_META, -1); > + if (reg <=3D 0) { > + DR_LOG(ERR, "Invalid register for compare metadata > field"); > + rte_errno =3D EINVAL; > + return rte_errno; > + } > + > + fc =3D mlx5dr_definer_get_register_fc(cd, reg); > + if (!fc) > + return rte_errno; > + > + fc->item_idx =3D item_idx; > + fc->tag_set =3D &mlx5dr_definer_compare_set; > + fc->tag_mask_set =3D &mlx5dr_definer_ones_set; > + fc->compare_idx =3D dw_offset; > + break; > + case RTE_FLOW_FIELD_TAG: > + reg =3D flow_hw_get_reg_id_from_ctx(cd->ctx, > + RTE_FLOW_ITEM_TYPE_TAG, > + f->tag_index); > + if (reg <=3D 0) { > + DR_LOG(ERR, "Invalid register for compare tag field"); > + rte_errno =3D EINVAL; > + return rte_errno; > + } > + > + fc =3D mlx5dr_definer_get_register_fc(cd, reg); > + if (!fc) > + return rte_errno; > + > + fc->item_idx =3D item_idx; > + fc->tag_set =3D &mlx5dr_definer_compare_set; > + fc->tag_mask_set =3D &mlx5dr_definer_ones_set; > + fc->compare_idx =3D dw_offset; > + break; > + case RTE_FLOW_FIELD_VALUE: > + if (dw_offset =3D=3D MLX5DR_DEFINER_COMPARE_ARGUMENT_0) { > + DR_LOG(ERR, "Argument field does not support > immediate value"); > + goto err_notsup; > + } > + break; > + case RTE_FLOW_FIELD_RANDOM: > + fc =3D &cd->fc[MLX5DR_DEFINER_FNAME_RANDOM_NUM]; > + fc->item_idx =3D item_idx; > + fc->tag_set =3D &mlx5dr_definer_compare_set; > + fc->tag_mask_set =3D &mlx5dr_definer_ones_set; > + fc->compare_idx =3D dw_offset; > + DR_CALC_SET_HDR(fc, random_number, random_number); > + break; > + default: > + DR_LOG(ERR, "%u field is not supported", f->field); > + goto err_notsup; > + } > + > + if (fc && other_f && other_f->field =3D=3D RTE_FLOW_FIELD_VALUE) > + fc->compare_set_base =3D true; > + > + return 0; > + > +err_notsup: > + rte_errno =3D ENOTSUP; > + return rte_errno; > +} > + > +static int > +mlx5dr_definer_conv_item_compare(struct mlx5dr_definer_conv_data *cd, > + struct rte_flow_item *item, > + int item_idx) > +{ > + const struct rte_flow_item_compare *m =3D item->mask; > + const struct rte_flow_field_data *a =3D &m->a; > + const struct rte_flow_field_data *b =3D &m->b; > + int ret; > + > + if (m->width !=3D 0xffffffff) { > + DR_LOG(ERR, "compare item width of 0x%x is not supported, > only full DW supported", > + m->width); > + rte_errno =3D ENOTSUP; > + return rte_errno; > + } > + > + ret =3D mlx5dr_definer_conv_item_compare_field(a, b, cd, item_idx, > + > MLX5DR_DEFINER_COMPARE_ARGUMENT_0); > + if (ret) > + return ret; > + > + ret =3D mlx5dr_definer_conv_item_compare_field(b, NULL, cd, item_idx, > + > MLX5DR_DEFINER_COMPARE_BASE_0); > + if (ret) > + return ret; > + > + return 0; > +} > + > static int > mlx5dr_definer_conv_items_to_hl(struct mlx5dr_context *ctx, > struct mlx5dr_match_template *mt, > - uint8_t *hl) > + uint8_t *hl, > + struct mlx5dr_matcher *matcher) > { > struct mlx5dr_definer_fc fc[MLX5DR_DEFINER_FNAME_MAX] =3D {{0}}; > struct mlx5dr_definer_conv_data cd =3D {0}; @@ -2762,6 +2956,11 @@ > mlx5dr_definer_conv_items_to_hl(struct mlx5dr_context *ctx, > if (ret) > return ret; >=20 > + if (mlx5dr_matcher_is_compare(matcher)) { > + DR_LOG(ERR, "Compare matcher not supported for > more than one item"); > + goto not_supp; > + } > + > switch ((int)items->type) { > case RTE_FLOW_ITEM_TYPE_ETH: > ret =3D mlx5dr_definer_conv_item_eth(&cd, items, i); @@ > -2907,10 +3106,18 @@ mlx5dr_definer_conv_items_to_hl(struct mlx5dr_contex= t > *ctx, > ret =3D mlx5dr_definer_conv_item_vxlan_gpe(&cd, items, > i); > item_flags |=3D MLX5_FLOW_LAYER_VXLAN_GPE; > break; > + case RTE_FLOW_ITEM_TYPE_COMPARE: > + if (i) { > + DR_LOG(ERR, "Compare matcher not supported > for more than one item"); > + goto not_supp; > + } > + ret =3D mlx5dr_definer_conv_item_compare(&cd, items, > i); > + item_flags |=3D MLX5_FLOW_ITEM_COMPARE; > + matcher->flags |=3D > MLX5DR_MATCHER_FLAGS_COMPARE; > + break; > default: > DR_LOG(ERR, "Unsupported item type %d", items- > >type); > - rte_errno =3D ENOTSUP; > - return rte_errno; > + goto not_supp; > } >=20 > cd.last_item =3D items->type; > @@ -2931,6 +3138,10 @@ mlx5dr_definer_conv_items_to_hl(struct > mlx5dr_context *ctx, > } >=20 > return 0; > + > +not_supp: > + rte_errno =3D ENOTSUP; > + return rte_errno; > } >=20 > static int > @@ -3318,6 +3529,7 @@ mlx5dr_definer_calc_layout(struct mlx5dr_matcher > *matcher, { > struct mlx5dr_context *ctx =3D matcher->tbl->ctx; > struct mlx5dr_match_template *mt =3D matcher->mt; > + struct mlx5dr_definer_fc *fc; > uint8_t *match_hl; > int i, ret; >=20 > @@ -3335,13 +3547,35 @@ mlx5dr_definer_calc_layout(struct mlx5dr_matcher > *matcher, > * and allocate the match and range field copy array (fc & fcr). > */ > for (i =3D 0; i < matcher->num_of_mt; i++) { > - ret =3D mlx5dr_definer_conv_items_to_hl(ctx, &mt[i], match_hl); > + ret =3D mlx5dr_definer_conv_items_to_hl(ctx, &mt[i], match_hl, > +matcher); > if (ret) { > DR_LOG(ERR, "Failed to convert items to header > layout"); > goto free_fc; > } > } >=20 > + if (mlx5dr_matcher_is_compare(matcher)) { > + ret =3D mlx5dr_matcher_validate_compare_attr(matcher); > + if (ret) > + goto free_fc; > + > + /* Due some HW limitation need to fill unused > + * DW's 0-5 and byte selectors with 0xff. > + */ > + for (i =3D 0; i < DW_SELECTORS_MATCH; i++) > + match_definer->dw_selector[i] =3D 0xff; > + > + for (i =3D 0; i < BYTE_SELECTORS; i++) > + match_definer->byte_selector[i] =3D 0xff; > + > + for (i =3D 0; i < mt[0].fc_sz; i++) { > + fc =3D &mt[0].fc[i]; > + match_definer->dw_selector[fc->compare_idx] =3D fc- > >byte_off / DW_SIZE; > + } > + > + goto out; > + } > + > /* Find the match definer layout for header layout match union */ > ret =3D mlx5dr_definer_find_best_match_fit(ctx, match_definer, > match_hl); > if (ret) { > @@ -3356,6 +3590,7 @@ mlx5dr_definer_calc_layout(struct mlx5dr_matcher > *matcher, > goto free_fc; > } >=20 > +out: > simple_free(match_hl); > return 0; >=20 > diff --git a/drivers/net/mlx5/hws/mlx5dr_definer.h > b/drivers/net/mlx5/hws/mlx5dr_definer.h > index ced9d9da13..9f2b5e7dc9 100644 > --- a/drivers/net/mlx5/hws/mlx5dr_definer.h > +++ b/drivers/net/mlx5/hws/mlx5dr_definer.h > @@ -17,6 +17,37 @@ > #define DW_SELECTORS_RANGE 2 > #define BYTE_SELECTORS_RANGE 8 >=20 > +enum mlx5dr_definer_compare_ste_dw_offset { > + /* In compare STE the matching DW's starts after the 3 actions */ > + MLX5DR_DEFINER_COMPARE_STE_ARGUMENT_1 =3D 3, > + MLX5DR_DEFINER_COMPARE_STE_ARGUMENT_0, > + MLX5DR_DEFINER_COMPARE_STE_BASE_1, > + MLX5DR_DEFINER_COMPARE_STE_BASE_0, > + MLX5DR_DEFINER_COMPARE_STE_TAG_DW_3, > + MLX5DR_DEFINER_COMPARE_STE_TAG_DW_2, > + MLX5DR_DEFINER_COMPARE_STE_TAG_DW_1, > + MLX5DR_DEFINER_COMPARE_STE_TAG_DW_0, > +}; > + > +enum mlx5dr_definer_dw_selectors { > + MLX5DR_DEFINER_SELECTOR_DW0, > + MLX5DR_DEFINER_SELECTOR_DW1, > + MLX5DR_DEFINER_SELECTOR_DW2, > + MLX5DR_DEFINER_SELECTOR_DW3, > + MLX5DR_DEFINER_SELECTOR_DW4, > + MLX5DR_DEFINER_SELECTOR_DW5, > + MLX5DR_DEFINER_SELECTOR_DW6, > + MLX5DR_DEFINER_SELECTOR_DW7, > + MLX5DR_DEFINER_SELECTOR_DW8, > +}; > + > +enum mlx5dr_definer_compare_dw_selectors { > + MLX5DR_DEFINER_COMPARE_ARGUMENT_0 =3D > MLX5DR_DEFINER_SELECTOR_DW4, > + MLX5DR_DEFINER_COMPARE_ARGUMENT_1 =3D > MLX5DR_DEFINER_SELECTOR_DW5, > + MLX5DR_DEFINER_COMPARE_BASE_0 =3D > MLX5DR_DEFINER_SELECTOR_DW2, > + MLX5DR_DEFINER_COMPARE_BASE_1 =3D > MLX5DR_DEFINER_SELECTOR_DW3, }; > + > enum mlx5dr_definer_fname { > MLX5DR_DEFINER_FNAME_ETH_SMAC_48_16_O, > MLX5DR_DEFINER_FNAME_ETH_SMAC_48_16_I, > @@ -188,6 +219,8 @@ struct mlx5dr_definer_fc { > uint8_t item_idx; > uint8_t is_range; > uint16_t extra_data; > + uint8_t compare_idx; > + bool compare_set_base; > uint32_t byte_off; > int bit_off; > uint32_t bit_mask; > diff --git a/drivers/net/mlx5/hws/mlx5dr_matcher.c > b/drivers/net/mlx5/hws/mlx5dr_matcher.c > index 4ea161eae6..cede24237f 100644 > --- a/drivers/net/mlx5/hws/mlx5dr_matcher.c > +++ b/drivers/net/mlx5/hws/mlx5dr_matcher.c > @@ -485,6 +485,7 @@ static int mlx5dr_matcher_create_rtc(struct > mlx5dr_matcher *matcher, > rtc_attr.log_depth =3D attr->table.sz_col_log; > rtc_attr.is_frst_jumbo =3D mlx5dr_matcher_mt_is_jumbo(mt); > rtc_attr.is_scnd_range =3D mlx5dr_matcher_mt_is_range(mt); > + rtc_attr.is_compare =3D mlx5dr_matcher_is_compare(matcher); > rtc_attr.miss_ft_id =3D matcher->end_ft->id; >=20 > if (attr->insert_mode =3D=3D MLX5DR_MATCHER_INSERT_BY_HASH) > { @@ -497,6 +498,10 @@ static int mlx5dr_matcher_create_rtc(struct > mlx5dr_matcher *matcher, > rtc_attr.num_hash_definer =3D 1; > rtc_attr.match_definer_0 =3D > mlx5dr_definer_get_id(matcher- > >hash_definer); > + } else if (mlx5dr_matcher_is_compare(matcher)) { > + rtc_attr.match_definer_0 =3D ctx->caps- > >trivial_match_definer; > + rtc_attr.fw_gen_wqe =3D true; > + rtc_attr.num_hash_definer =3D 1; > } else { > /* The first mt is used since all share the same > definer */ > rtc_attr.match_definer_0 =3D > mlx5dr_definer_get_id(mt->definer); > @@ -1452,3 +1457,46 @@ int mlx5dr_match_template_destroy(struct > mlx5dr_match_template *mt) > simple_free(mt); > return 0; > } > + > +int mlx5dr_matcher_validate_compare_attr(struct mlx5dr_matcher > +*matcher) { > + struct mlx5dr_cmd_query_caps *caps =3D matcher->tbl->ctx->caps; > + struct mlx5dr_matcher_attr *attr =3D &matcher->attr; > + > + if (mlx5dr_table_is_root(matcher->tbl)) { > + DR_LOG(ERR, "Compare matcher is not supported for root > tables"); > + goto err; > + } > + > + if (attr->mode !=3D MLX5DR_MATCHER_RESOURCE_MODE_HTABLE) { > + DR_LOG(ERR, "Compare matcher is only supported with pre- > defined table size"); > + goto err; > + } > + > + if (attr->insert_mode !=3D MLX5DR_MATCHER_INSERT_BY_HASH || > + attr->distribute_mode !=3D > MLX5DR_MATCHER_DISTRIBUTE_BY_HASH) { > + DR_LOG(ERR, "Gen WQE for compare matcher must be inserted > and distribute by hash"); > + goto err; > + } > + > + if (matcher->num_of_mt !=3D 1 || matcher->num_of_at !=3D 1) { > + DR_LOG(ERR, "Compare matcher match templates and action > templates must be 1 for each"); > + goto err; > + } > + > + if (attr->table.sz_col_log || attr->table.sz_row_log) { > + DR_LOG(ERR, "Compare matcher supports only 1x1 table size"); > + goto err; > + } > + > + if (!IS_BIT_SET(caps->supp_ste_format_gen_wqe, > MLX5_IFC_RTC_STE_FORMAT_4DW_RANGE)) { > + DR_LOG(ERR, "Gen WQE Compare match format not > supported"); > + goto err; > + } > + > + return 0; > + > +err: > + rte_errno =3D ENOTSUP; > + return rte_errno; > +} > diff --git a/drivers/net/mlx5/hws/mlx5dr_matcher.h > b/drivers/net/mlx5/hws/mlx5dr_matcher.h > index 363a61fd41..ca6c212536 100644 > --- a/drivers/net/mlx5/hws/mlx5dr_matcher.h > +++ b/drivers/net/mlx5/hws/mlx5dr_matcher.h > @@ -26,6 +26,7 @@ enum mlx5dr_matcher_flags { > MLX5DR_MATCHER_FLAGS_RANGE_DEFINER =3D 1 << 0, > MLX5DR_MATCHER_FLAGS_HASH_DEFINER =3D 1 << 1, > MLX5DR_MATCHER_FLAGS_COLLISION =3D 1 << 2, > + MLX5DR_MATCHER_FLAGS_COMPARE =3D 1 << 4, > }; >=20 > struct mlx5dr_match_template { > @@ -89,12 +90,19 @@ mlx5dr_matcher_mt_is_range(struct > mlx5dr_match_template *mt) > return (!!mt->range_definer); > } >=20 > +static inline bool > +mlx5dr_matcher_is_compare(struct mlx5dr_matcher *matcher) { > + return !!(matcher->flags & MLX5DR_MATCHER_FLAGS_COMPARE); } > + > static inline bool mlx5dr_matcher_req_fw_wqe(struct mlx5dr_matcher > *matcher) { > /* Currently HWS doesn't support hash different from match or range */ > return unlikely(matcher->flags & > (MLX5DR_MATCHER_FLAGS_HASH_DEFINER | > - MLX5DR_MATCHER_FLAGS_RANGE_DEFINER)); > + MLX5DR_MATCHER_FLAGS_RANGE_DEFINER | > + MLX5DR_MATCHER_FLAGS_COMPARE)); > } >=20 > int mlx5dr_matcher_conv_items_to_prm(uint64_t *match_buf, @@ -120,4 > +128,6 @@ int mlx5dr_matcher_free_rtc_pointing(struct mlx5dr_context *ctx= , > enum mlx5dr_table_type type, > struct mlx5dr_devx_obj *devx_obj); >=20 > +int mlx5dr_matcher_validate_compare_attr(struct mlx5dr_matcher > +*matcher); > + > #endif /* MLX5DR_MATCHER_H_ */ > -- > 2.25.1