From: Rahul Bhansali <rbhansali@marvell.com>
To: fengchengwen <fengchengwen@huawei.com>,
"dev@dpdk.org" <dev@dpdk.org>,
Ruifeng Wang <ruifeng.wang@arm.com>,
Jan Viktorin <viktorin@rehivetech.com>,
Bruce Richardson <bruce.richardson@intel.com>
Cc: Jerin Jacob Kollanukkaran <jerinj@marvell.com>
Subject: RE: [EXT] Re: [PATCH 2/2] config/arm: disable SVE for cn10k
Date: Fri, 6 May 2022 04:54:15 +0000 [thread overview]
Message-ID: <CO6PR18MB384451B091EADC8380D6A0D2B8C59@CO6PR18MB3844.namprd18.prod.outlook.com> (raw)
In-Reply-To: <2e290e15-a438-2591-4b69-83ef9c2c8634@huawei.com>
> -----Original Message-----
> From: fengchengwen <fengchengwen@huawei.com>
> Sent: Friday, May 6, 2022 8:00 AM
> To: Rahul Bhansali <rbhansali@marvell.com>; dev@dpdk.org; Ruifeng Wang
> <ruifeng.wang@arm.com>; Jan Viktorin <viktorin@rehivetech.com>; Bruce
> Richardson <bruce.richardson@intel.com>
> Cc: Jerin Jacob Kollanukkaran <jerinj@marvell.com>
> Subject: [EXT] Re: [PATCH 2/2] config/arm: disable SVE for cn10k
>
> External Email
>
> ----------------------------------------------------------------------
> On 2022/5/5 22:27, Rahul Bhansali wrote:
> > This disable the SVE flag for cn10k.
> >
> > Performance impact:-
> > With l3fwd example, lpm lookup performance increased by ~21% if Neon
> > is used instead of SVE.
> >
> > Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
> > ---
> > config/arm/meson.build | 3 ++-
> > 1 file changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/config/arm/meson.build b/config/arm/meson.build index
> > dafb342cc6..39b7a1270c 100644
> > --- a/config/arm/meson.build
> > +++ b/config/arm/meson.build
> > @@ -281,7 +281,8 @@ soc_cn10k = {
> > ],
> > 'part_number': '0xd49',
> > 'extra_march_features': ['crypto'],
> > - 'numa': false
> > + 'numa': false,
> > + 'sve': false
>
> Suggest remove sve2 flag:
> '0xd49': {
> 'march': 'armv8.5-a',
> 'march_features': ['sve2'], ---remove 'sve2'
> 'flags': [
> ['RTE_MACHINE', '"neoverse-n2"'],
> ['RTE_ARM_FEATURE_ATOMICS', true],
> ['RTE_MAX_LCORE', 64],
> ['RTE_MAX_NUMA_NODES', 1]
> ]
> }
>
If I remove here, then this will also change for " Arm Neoverse N2 soc_n2", because part_number is same, Right ?
Because of this reason, I thought to have separate flag instead of updating march_features.
> > }
> >
> > soc_dpaa = {
> >
next prev parent reply other threads:[~2022-05-06 4:54 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-05 14:27 [PATCH 1/2] config/arm: add SVE control flag Rahul Bhansali
2022-05-05 14:27 ` [PATCH 2/2] config/arm: disable SVE for cn10k Rahul Bhansali
2022-05-06 2:29 ` fengchengwen
2022-05-06 4:54 ` Rahul Bhansali [this message]
2022-05-06 6:36 ` [EXT] " fengchengwen
2022-05-06 7:23 ` Ruifeng Wang
2022-05-06 13:17 ` Rahul Bhansali
2022-05-07 0:52 ` fengchengwen
2022-05-05 14:39 ` [PATCH 1/2] config/arm: add SVE control flag Bruce Richardson
2022-05-06 14:16 ` [EXT] " Rahul Bhansali
2022-05-06 2:23 ` fengchengwen
2022-05-07 9:39 ` [PATCH v2 1/2] config/arm: add SVE ACLE " Rahul Bhansali
2022-05-07 9:39 ` [PATCH v2 2/2] config/arm: disable SVE ACLE for cn10k Rahul Bhansali
2022-05-09 0:49 ` [PATCH v2 1/2] config/arm: add SVE ACLE control flag fengchengwen
2022-05-09 9:46 ` [PATCH v3 " Rahul Bhansali
2022-05-09 9:46 ` [PATCH v3 2/2] config/arm: disable SVE ACLE for cn10k Rahul Bhansali
2022-05-09 10:19 ` [PATCH v4 1/2] config/arm: add SVE ACLE control flag Rahul Bhansali
2022-05-09 10:19 ` [PATCH v4 2/2] config/arm: disable SVE ACLE for cn10k Rahul Bhansali
2022-05-10 2:57 ` fengchengwen
2022-05-11 1:35 ` Ruifeng Wang
2022-05-11 4:12 ` Honnappa Nagarahalli
2022-05-10 2:57 ` [PATCH v4 1/2] config/arm: add SVE ACLE control flag fengchengwen
2022-05-11 1:35 ` Ruifeng Wang
2022-05-11 4:09 ` Honnappa Nagarahalli
2022-05-17 7:56 ` Juraj Linkeš
2022-05-18 9:18 ` Rahul Bhansali
2022-05-18 14:45 ` Juraj Linkeš
2022-05-19 13:28 ` [PATCH v5 " Rahul Bhansali
2022-05-19 13:28 ` [PATCH v5 2/2] config/arm: disable SVE ACLE for cn10k Rahul Bhansali
2022-06-01 22:38 ` Thomas Monjalon
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