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Fri, 6 May 2022 14:16:39 +0000 From: Rahul Bhansali To: Bruce Richardson CC: "dev@dpdk.org" , Ruifeng Wang , Jan Viktorin , Jerin Jacob Kollanukkaran Subject: RE: [EXT] Re: [PATCH 1/2] config/arm: add SVE control flag Thread-Topic: [EXT] Re: [PATCH 1/2] config/arm: add SVE control flag Thread-Index: AQHYYIxTzbFuv5szSEqWT/LDNSmBHa0QWrQAgAGLqrA= Date: Fri, 6 May 2022 14:16:39 +0000 Message-ID: References: <20220505142744.1423344-1-rbhansali@marvell.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 75900748-6413-4c79-693c-08da2f6b0955 x-ms-traffictypediagnostic: MN2PR18MB3463:EE_ x-microsoft-antispam-prvs: x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: 94pOuWUigIjuFWsbHo8RM0GBjfo/gz/wJtXYZjMK9w2Z21f/6/9gsb4QyUls1GI4Gi/jmVQBclIguQxcal/MGuWcuhpABKRYdaOJWFS4YZKQHz9UJChPbQKcxdURGbKv5tH55BEBREZ5Rt2s6N33IWtCqgEX8H1YyV3XPK2TTFwuSkMBwnFRTH0DXC1ZDXF2nxDAzTD1lm+fmMU32OeXMD/EmXVYgY2suLiHlVW1OYN6xgKNm4JIr4GGcrV44RG7XyrqWHPDUaxZBbCkSarfG3ffBrMqKmsncPxyi4dy58rKbxGGhEj3NjEQyIoQFRGeDQgqedaDH/StpSVQFd+5drk6fZsnjLfl91Bc/Mqc6RAAXJ/h1vpptnY7+ZEYNRPavtpetljZJcXNsn5X77qseqaCETyfC4YU3WSTuFMbFfrlHqr8potuVdhjTVHsXlH+TvsURvdqTAYLMjiOiyGaPQOY0g/4DV1bSdharNSYePqPT/Rz+Ex0UxSoiHYk86lGSqucxmHHrtJ6IiMWMnJsyp/eYQnkn/yP+QtjFcLlY3oshtMB5GuPZ72sa/WNZKHlMRnQbRyCFA7HomFCTPVzuc4VPQkQOr2DMExY0/1VOHlHjzMFj37uHGyaEtVT6hjzPDVhXKTQzRThzv4wexNJ6n/OmiEVk+9BBXfwjVp+h2GFi0m2oJujxa8swv2aoMqcMfXK34gm88/4EtGK9cYyZg== x-forefront-antispam-report: CIP:255.255.255.255; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: marvell.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: CO6PR18MB3844.namprd18.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 75900748-6413-4c79-693c-08da2f6b0955 X-MS-Exchange-CrossTenant-originalarrivaltime: 06 May 2022 14:16:39.0632 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 70e1fb47-1155-421d-87fc-2e58f638b6e0 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: NMYRayMlVQRaO0ncjJIlhEZQkn60RkYGoQ8CICMsFxraFHBM5tdnlnHgyqctWRlbx0D7XIb0im3Uq35H12bn/g== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR18MB3463 X-Proofpoint-GUID: k8sQHiPb6EhsWgQn_D1aRZJKm-INbkix X-Proofpoint-ORIG-GUID: k8sQHiPb6EhsWgQn_D1aRZJKm-INbkix X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.858,Hydra:6.0.486,FMLib:17.11.64.514 definitions=2022-05-06_04,2022-05-06_01,2022-02-23_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org > -----Original Message----- > From: Bruce Richardson > Sent: Thursday, May 5, 2022 8:09 PM > To: Rahul Bhansali > Cc: dev@dpdk.org; Ruifeng Wang ; Jan Viktorin > ; Jerin Jacob Kollanukkaran > Subject: [EXT] Re: [PATCH 1/2] config/arm: add SVE control flag >=20 > External Email >=20 > ---------------------------------------------------------------------- > On Thu, May 05, 2022 at 07:57:43PM +0530, Rahul Bhansali wrote: > > This add the control flag for SVE to enable or disable > > RTE_HAS_SVE_ACLE macro in the build. > > > > Signed-off-by: Rahul Bhansali > > --- > > config/arm/meson.build | 3 ++- > > 1 file changed, 2 insertions(+), 1 deletion(-) > > > > diff --git a/config/arm/meson.build b/config/arm/meson.build index > > 8aead74086..dafb342cc6 100644 > > --- a/config/arm/meson.build > > +++ b/config/arm/meson.build > > @@ -603,7 +603,8 @@ if (cc.get_define('__ARM_NEON', args: machine_args) > !=3D '' or > > compile_time_cpuflags +=3D ['RTE_CPUFLAG_NEON'] endif > > > > -if cc.get_define('__ARM_FEATURE_SVE', args: machine_args) !=3D '' > > +if (cc.get_define('__ARM_FEATURE_SVE', args: machine_args) !=3D '' and > > + soc_config.get('sve', true)) >=20 > Please double-indent this so that it does not line up with the following = lines of > the block. >=20 Ack, will send v2 with this double-indent change. > > compile_time_cpuflags +=3D ['RTE_CPUFLAG_SVE'] > > if (cc.check_header('arm_sve.h')) > > dpdk_conf.set('RTE_HAS_SVE_ACLE', 1) > > -- > > 2.25.1 > >