[dpdk-dev] [PATCH 0/2] fix level configuration in compress

[dpdk-dev] [PATCH 0/2] fix level configuration in compress

[Raja Zidane]

The mlx5 compress PMD uses HW acceleration for the compress operations.
The mlx5 HW device has no level style mode, which does a tradeoff between
throughput and compression ratio, unlike SW drivers where the CPU is doing
the compress, and more CPU effort can cause a better compression ratio.
The mlx5 driver wrongly defined the Huffman block size configuration
according to the level that doesn't fill the level API requirement for
the tradeoff.

Remove the effect of the level configuration in compress operation. 
Add "log-block-size" devarg to select compression block size manually.

Raja Zidane (2):
  compress/mlx5: fix level configuration in compress
  compress/mlx5: add block size devarg

 doc/guides/compressdevs/mlx5.rst       | 10 ++++
 doc/guides/rel_notes/release_21_11.rst |  2 +
 drivers/compress/mlx5/mlx5_compress.c  | 79 +++++++++++++++++++++-----
 3 files changed, 76 insertions(+), 15 deletions(-)

-- 
2.17.1

[dpdk-dev] [PATCH 1/2] compress/mlx5: fix level configuration in compress

[Raja Zidane]

The mlx5 compress PMD uses HW acceleration for the compress operations.
The mlx5 HW device has no level style mode, which does a tradeoff between
throughput and compression ratio, unlike SW drivers where the CPU is doing
the compress, and more CPU effort can cause a better compression ratio.
The mlx5 driver wrongly defined the Huffman block size configuration
according to the level that doesn't fill the level API requirement for
the tradeoff.

Remove the effect of the level configuration in compress operation.

Fixes: 237aad88245b ("compress/mlx5: fix compression level translation")
Fixes: 39a2c8715f8f ("compress/mlx5: add transformation operations")
Cc: stable@dpdk.org

Signed-off-by: Raja Zidane <rzidane@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
 drivers/compress/mlx5/mlx5_compress.c | 18 +++---------------
 1 file changed, 3 insertions(+), 15 deletions(-)

diff --git a/drivers/compress/mlx5/mlx5_compress.c b/drivers/compress/mlx5/mlx5_compress.c
index c4081c5f7d..9adc0e41e0 100644
--- a/drivers/compress/mlx5/mlx5_compress.c
+++ b/drivers/compress/mlx5/mlx5_compress.c
@@ -343,21 +343,9 @@ mlx5_compress_xform_create(struct rte_compressdev *dev,
 			xfrm->gga_ctrl1 += RTE_MIN(rte_log2_u32(size),
 					 MLX5_COMP_MAX_WIN_SIZE_CONF) <<
 						WQE_GGA_COMP_WIN_SIZE_OFFSET;
-			switch (xform->compress.level) {
-			case RTE_COMP_LEVEL_PMD_DEFAULT:
-				size = MLX5_GGA_COMP_LOG_BLOCK_SIZE_MAX;
-				break;
-			case RTE_COMP_LEVEL_MAX:
-				size = priv->min_block_size;
-				break;
-			default:
-				size = RTE_MAX(MLX5_GGA_COMP_LOG_BLOCK_SIZE_MAX
-					+ 1 - xform->compress.level,
-					priv->min_block_size);
-			}
-			xfrm->gga_ctrl1 += RTE_MIN(size,
-					    MLX5_GGA_COMP_LOG_BLOCK_SIZE_MAX) <<
-						 WQE_GGA_COMP_BLOCK_SIZE_OFFSET;
+			size = MLX5_GGA_COMP_LOG_BLOCK_SIZE_MAX;
+			xfrm->gga_ctrl1 += size <<
+						WQE_GGA_COMP_BLOCK_SIZE_OFFSET;
 			xfrm->opcode += MLX5_OPC_MOD_MMO_COMP <<
 							WQE_CSEG_OPC_MOD_OFFSET;
 			size = xform->compress.deflate.huffman ==
-- 
2.17.1

[dpdk-dev] [PATCH 2/2] compress/mlx5: add block size devarg

[Raja Zidane]

Currently, the compression block size is 15 by default, which
is the maximum.

Add "log-block-size" devarg to select compression block size manually.
The value provided should be between 4 to 15.
Any out-of-range value will be defaulted to 15.

Signed-off-by: Raja Zidane <rzidane@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
 doc/guides/compressdevs/mlx5.rst       | 10 ++++
 doc/guides/rel_notes/release_21_11.rst |  2 +
 drivers/compress/mlx5/mlx5_compress.c  | 63 +++++++++++++++++++++++++-
 3 files changed, 74 insertions(+), 1 deletion(-)

diff --git a/doc/guides/compressdevs/mlx5.rst b/doc/guides/compressdevs/mlx5.rst
index 38230d4a2e..a4e17f65b3 100644
--- a/doc/guides/compressdevs/mlx5.rst
+++ b/doc/guides/compressdevs/mlx5.rst
@@ -82,6 +82,16 @@ Limitations
 * Scatter-Gather, SHA and Stateful are not supported.
 * Non-compressed block is not supported in compress (supported in decompress).
 
+Driver options
+--------------
+
+- ``log-block-size`` parameter [int]
+
+  Log of the Huffman block size in the Deflate algorithm.
+  Values from [4-15]; value x means block size is 2^x.
+  The default value is 15.
+
+
 Supported NICs
 --------------
 
diff --git a/doc/guides/rel_notes/release_21_11.rst b/doc/guides/rel_notes/release_21_11.rst
index 1ccac87b73..4dccbcb386 100644
--- a/doc/guides/rel_notes/release_21_11.rst
+++ b/doc/guides/rel_notes/release_21_11.rst
@@ -305,6 +305,8 @@ New Features
     * Pcapng format with timestamps and meta-data.
     * Fixes packet capture with stripped VLAN tags.
 
+* **Updated mlx5 compress PMD.**
+  * Added devarg to allow manual setting of Huffman block size.
 
 Removed Items
 -------------
diff --git a/drivers/compress/mlx5/mlx5_compress.c b/drivers/compress/mlx5/mlx5_compress.c
index 9adc0e41e0..d13abba39f 100644
--- a/drivers/compress/mlx5/mlx5_compress.c
+++ b/drivers/compress/mlx5/mlx5_compress.c
@@ -25,6 +25,10 @@
 #define MLX5_COMPRESS_MAX_QPS 1024
 #define MLX5_COMP_MAX_WIN_SIZE_CONF 6u
 
+struct mlx5_compress_devarg_params {
+	uint32_t log_block_sz;
+};
+
 struct mlx5_compress_xform {
 	LIST_ENTRY(mlx5_compress_xform) next;
 	enum rte_comp_xform_type type;
@@ -51,6 +55,7 @@ struct mlx5_compress_priv {
 	uint32_t mmo_comp_qp:1;
 	uint32_t mmo_dma_sq:1;
 	uint32_t mmo_dma_qp:1;
+	uint32_t log_block_sz;
 #ifndef RTE_ARCH_64
 	rte_spinlock_t uar32_sl;
 #endif /* RTE_ARCH_64 */
@@ -343,7 +348,7 @@ mlx5_compress_xform_create(struct rte_compressdev *dev,
 			xfrm->gga_ctrl1 += RTE_MIN(rte_log2_u32(size),
 					 MLX5_COMP_MAX_WIN_SIZE_CONF) <<
 						WQE_GGA_COMP_WIN_SIZE_OFFSET;
-			size = MLX5_GGA_COMP_LOG_BLOCK_SIZE_MAX;
+			size = priv->log_block_sz;
 			xfrm->gga_ctrl1 += size <<
 						WQE_GGA_COMP_BLOCK_SIZE_OFFSET;
 			xfrm->opcode += MLX5_OPC_MOD_MMO_COMP <<
@@ -693,12 +698,66 @@ mlx5_compress_uar_prepare(struct mlx5_compress_priv *priv)
 	return 0;
 }
 
+static int
+mlx5_compress_args_check_handler(const char *key, const char *val, void *opaque)
+{
+	struct mlx5_compress_devarg_params *devarg_prms = opaque;
+
+	if (strcmp(key, "log-block-size") == 0) {
+		errno = 0;
+		devarg_prms->log_block_sz = (uint32_t)strtoul(val, NULL, 10);
+		if (errno) {
+			DRV_LOG(WARNING, "%s: \"%s\" is an invalid integer."
+				, key, val);
+			return -errno;
+		}
+		return 0;
+	}
+	return 0;
+}
+
+static int
+mlx5_compress_handle_devargs(struct rte_devargs *devargs,
+			  struct mlx5_compress_devarg_params *devarg_prms,
+			  struct mlx5_hca_attr *att)
+{
+	struct rte_kvargs *kvlist;
+
+	devarg_prms->log_block_sz = MLX5_GGA_COMP_LOG_BLOCK_SIZE_MAX;
+	if (devargs == NULL)
+		return 0;
+	kvlist = rte_kvargs_parse(devargs->args, NULL);
+	if (kvlist == NULL) {
+		DRV_LOG(ERR, "Failed to parse devargs.");
+		rte_errno = EINVAL;
+		return -1;
+	}
+	if (rte_kvargs_process(kvlist, NULL, mlx5_compress_args_check_handler,
+			   devarg_prms) != 0) {
+		DRV_LOG(ERR, "Devargs handler function Failed.");
+		rte_kvargs_free(kvlist);
+		rte_errno = EINVAL;
+		return -1;
+	}
+	rte_kvargs_free(kvlist);
+	if (devarg_prms->log_block_sz > MLX5_GGA_COMP_LOG_BLOCK_SIZE_MAX ||
+		devarg_prms->log_block_sz < att->compress_min_block_size) {
+		DRV_LOG(WARNING, "Log block size provided is out of range("
+			"%u); default it to %u.",
+			devarg_prms->log_block_sz,
+			MLX5_GGA_COMP_LOG_BLOCK_SIZE_MAX);
+		devarg_prms->log_block_sz = MLX5_GGA_COMP_LOG_BLOCK_SIZE_MAX;
+	}
+	return 0;
+}
+
 static int
 mlx5_compress_dev_probe(struct mlx5_common_device *cdev)
 {
 	struct rte_compressdev *compressdev;
 	struct mlx5_compress_priv *priv;
 	struct mlx5_hca_attr *attr = &cdev->config.hca_attr;
+	struct mlx5_compress_devarg_params devarg_prms = {0};
 	struct rte_compressdev_pmd_init_params init_params = {
 		.name = "",
 		.socket_id = cdev->dev->numa_node,
@@ -718,6 +777,7 @@ mlx5_compress_dev_probe(struct mlx5_common_device *cdev)
 		rte_errno = ENOTSUP;
 		return -ENOTSUP;
 	}
+	mlx5_compress_handle_devargs(cdev->dev->devargs, &devarg_prms, attr);
 	compressdev = rte_compressdev_pmd_create(ibdev_name, cdev->dev,
 						 sizeof(*priv), &init_params);
 	if (compressdev == NULL) {
@@ -731,6 +791,7 @@ mlx5_compress_dev_probe(struct mlx5_common_device *cdev)
 	compressdev->enqueue_burst = mlx5_compress_enqueue_burst;
 	compressdev->feature_flags = RTE_COMPDEV_FF_HW_ACCELERATED;
 	priv = compressdev->data->dev_private;
+	priv->log_block_sz = devarg_prms.log_block_sz;
 	priv->mmo_decomp_sq = attr->mmo_decompress_sq_en;
 	priv->mmo_decomp_qp = attr->mmo_decompress_qp_en;
 	priv->mmo_comp_sq = attr->mmo_compress_sq_en;
-- 
2.17.1

Re: [dpdk-dev] [EXT] [PATCH 0/2] fix level configuration in compress

[Akhil Goyal]

> The mlx5 compress PMD uses HW acceleration for the compress operations.
> The mlx5 HW device has no level style mode, which does a tradeoff between
> throughput and compression ratio, unlike SW drivers where the CPU is doing
> the compress, and more CPU effort can cause a better compression ratio.
> The mlx5 driver wrongly defined the Huffman block size configuration
> according to the level that doesn't fill the level API requirement for
> the tradeoff.
> 
> Remove the effect of the level configuration in compress operation.
> Add "log-block-size" devarg to select compression block size manually.
> 
Applied to dpdk-next-crypto

Thanks.