DPDK patches and discussions
 help / color / mirror / Atom feed
From: Akhil Goyal <gakhil@marvell.com>
To: "Chautru, Nicolas" <nicolas.chautru@intel.com>,
	"Vargas, Hernan" <hernan.vargas@intel.com>,
	"dev@dpdk.org" <dev@dpdk.org>,
	"trix@redhat.com" <trix@redhat.com>,
	"maxime.coquelin@redhat.com" <maxime.coquelin@redhat.com>
Cc: "Zhang, Qi Z" <qi.z.zhang@intel.com>
Subject: RE: [EXT] [PATCH v3 00/30] baseband/acc100: changes for 22.11
Date: Fri, 14 Oct 2022 06:33:45 +0000	[thread overview]
Message-ID: <CO6PR18MB4484B538DC5AF0B5441EEAE0D8249@CO6PR18MB4484.namprd18.prod.outlook.com> (raw)
In-Reply-To: <BY5PR11MB4451FDB4D20FA72E0F7E5EABF8249@BY5PR11MB4451.namprd11.prod.outlook.com>

> > > Hernan Vargas (30):
> > >   baseband/acc100: fix ring availability calculation
> > >   baseband/acc100: add function to check AQ availability
> > >   baseband/acc100: memory leak fix
> > >   baseband/acc100: add LDPC encoder padding function
> > >   baseband/acc100: check turbo dec/enc input
> > >   baseband/acc100: check for unlikely operation vals
> > >   baseband/acc100: enforce additional check on FCW
> > >   baseband/acc100: allocate ring/queue mem when NULL
> > >   baseband/acc100: reduce input length for CRC24B
> > >   baseband/acc100: fix clearing PF IR outside handler
> > >   baseband/acc100: set device min alignment to 1
> > >   baseband/acc100: add protection for NULL HARQ input
> > >   baseband/acc100: reset pointer after rte_free
> > >   baseband/acc100: fix debug print for LDPC FCW
> > >   baseband/acc100: add enqueue status
> > >   baseband/acc100: add scatter-gather support
> > >   baseband/acc100: add HARQ index helper function
> > >   baseband/acc100: enable input validation by default
> > >   baseband/acc100: added LDPC transport block support
> > >   baseband/acc100: update validate LDPC enc/dec
> > >   baseband/acc100: implement configurable queue depth
> > >   baseband/acc100: add queue stop operation
> > >   baseband/acc100: update uplink CB input length
> > >   baseband/acc100: rename ldpc encode function arg
> > >   baseband/acc100: update log messages
> > >   baseband/acc100: store FCW from first CB descriptor
> > >   baseband/acc100: update device info
> > >   baseband/acc100: add ring companion address
> > >   baseband/acc100: add workaround for deRM corner cases
> > >   baseband/acc100: configure PMON control registers
> > >
> > >  drivers/baseband/acc/acc100_pmd.h     |    5 +
> > >  drivers/baseband/acc/acc_common.h     |   10 +
> > >  drivers/baseband/acc/meson.build      |   21 +
> > >  drivers/baseband/acc/rte_acc100_pmd.c | 1197
> > > ++++++++++++++++++++-----
> > >  4 files changed, 1010 insertions(+), 223 deletions(-)
> > >
> > Hi Hernan/Nicolas,
> >
> > I see some ifdefs being used in the code and there is no documentation for
> > them On when and how to enable/disable them.
> > It would be much like a dead code which is not compiled at all, if any of the
> > build target does not enable them.
> >
> > Is it possible to replace them with runtime devargs instead of compile time
> > ifdefs?
> 
> In term of documentation gap, that is a fair point:
> - I believe the build time variable ACC100_EXT_MEM can be valuable for very
> specific troubleshoot (not for production) to shortcut the DDR on the card, but
> good point to document in the acc100.rst.
> - The RTE_BBDEV_OFFLOAD_COST is used across PMDs for a while. That could
> also be added to each PMD .rst.
> - The #ifndef RTE_LIBRTE_BBDEV_SKIP_VALIDATE is to skip validation of user
> API which protect from negative scenario and hence save a few cycles by not
> recommended by default. Can be added to acc100.rst.
> 
> In term of runtime devargs usage, can we decorrelate this from the series? If we
> introduce such dev args and expose them more explicitly we would need more
> updated validation in place, are you okay if we defer such change to next year?
> If really this is a big concern for you for 22.11 (this is indeed not ideal), we could
> limit/strip the upstream of the series to the default build configuration only
> (hence no new #ifdef) but still these options can be genuinely valuable to users
> (until moved to devargs) so I would prefer to keep as is but with updated
> documentation in acc100.rst.
> 
> What do you think?
I am ok to skip devargs for now. Can be added in next cycle.
Please update the documentation as needed for compile time flags.


      reply	other threads:[~2022-10-14  6:33 UTC|newest]

Thread overview: 58+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-12  2:53 Hernan Vargas
2022-10-12  2:53 ` [PATCH v3 01/30] baseband/acc100: fix ring availability calculation Hernan Vargas
2022-10-14  9:18   ` Maxime Coquelin
2022-10-12  2:53 ` [PATCH v3 02/30] baseband/acc100: add function to check AQ availability Hernan Vargas
2022-10-14  9:25   ` Maxime Coquelin
2022-10-12  2:53 ` [PATCH v3 03/30] baseband/acc100: memory leak fix Hernan Vargas
2022-10-14  9:29   ` Maxime Coquelin
2022-10-12  2:53 ` [PATCH v3 04/30] baseband/acc100: add LDPC encoder padding function Hernan Vargas
2022-10-14  9:33   ` Maxime Coquelin
2022-10-12  2:53 ` [PATCH v3 05/30] baseband/acc100: check turbo dec/enc input Hernan Vargas
2022-10-14  9:35   ` Maxime Coquelin
2022-10-12  2:53 ` [PATCH v3 06/30] baseband/acc100: check for unlikely operation vals Hernan Vargas
2022-10-14  9:39   ` Maxime Coquelin
2022-10-12  2:53 ` [PATCH v3 07/30] baseband/acc100: enforce additional check on FCW Hernan Vargas
2022-10-14  9:48   ` Maxime Coquelin
2022-10-12  2:53 ` [PATCH v3 08/30] baseband/acc100: allocate ring/queue mem when NULL Hernan Vargas
2022-10-14  9:55   ` Maxime Coquelin
2022-10-12  2:53 ` [PATCH v3 09/30] baseband/acc100: reduce input length for CRC24B Hernan Vargas
2022-10-14  9:56   ` Maxime Coquelin
2022-10-12  2:53 ` [PATCH v3 10/30] baseband/acc100: fix clearing PF IR outside handler Hernan Vargas
2022-10-14  9:56   ` Maxime Coquelin
2022-10-12  2:53 ` [PATCH v3 11/30] baseband/acc100: set device min alignment to 1 Hernan Vargas
2022-10-14 10:02   ` Maxime Coquelin
2022-10-12  2:53 ` [PATCH v3 12/30] baseband/acc100: add protection for NULL HARQ input Hernan Vargas
2022-10-14 10:03   ` Maxime Coquelin
2022-10-12  2:53 ` [PATCH v3 13/30] baseband/acc100: reset pointer after rte_free Hernan Vargas
2022-10-14 10:03   ` Maxime Coquelin
2022-10-12  2:53 ` [PATCH v3 14/30] baseband/acc100: fix debug print for LDPC FCW Hernan Vargas
2022-10-14 10:03   ` Maxime Coquelin
2022-10-12  2:53 ` [PATCH v3 15/30] baseband/acc100: add enqueue status Hernan Vargas
2022-10-14 10:04   ` Maxime Coquelin
2022-10-12  2:53 ` [PATCH v3 16/30] baseband/acc100: add scatter-gather support Hernan Vargas
2022-10-14 10:06   ` Maxime Coquelin
2022-10-12  2:53 ` [PATCH v3 17/30] baseband/acc100: add HARQ index helper function Hernan Vargas
2022-10-14 10:06   ` Maxime Coquelin
2022-10-12  2:53 ` [PATCH v3 18/30] baseband/acc100: enable input validation by default Hernan Vargas
2022-10-13 12:56   ` [EXT] " Akhil Goyal
2022-10-18 16:28   ` Maxime Coquelin
2022-10-19 22:12     ` Chautru, Nicolas
2022-10-21  8:06       ` Maxime Coquelin
2022-10-12  2:53 ` [PATCH v3 19/30] baseband/acc100: added LDPC transport block support Hernan Vargas
2022-10-12  2:53 ` [PATCH v3 20/30] baseband/acc100: update validate LDPC enc/dec Hernan Vargas
2022-10-12  2:53 ` [PATCH v3 21/30] baseband/acc100: implement configurable queue depth Hernan Vargas
2022-10-12  2:53 ` [PATCH v3 22/30] baseband/acc100: add queue stop operation Hernan Vargas
2022-10-12  2:53 ` [PATCH v3 23/30] baseband/acc100: update uplink CB input length Hernan Vargas
2022-10-12  2:53 ` [PATCH v3 24/30] baseband/acc100: rename ldpc encode function arg Hernan Vargas
2022-10-13 13:04   ` [EXT] " Akhil Goyal
2022-10-12  2:53 ` [PATCH v3 25/30] baseband/acc100: update log messages Hernan Vargas
2022-10-12  2:53 ` [PATCH v3 26/30] baseband/acc100: store FCW from first CB descriptor Hernan Vargas
2022-10-12  2:53 ` [PATCH v3 27/30] baseband/acc100: update device info Hernan Vargas
2022-10-12  2:53 ` [PATCH v3 28/30] baseband/acc100: add ring companion address Hernan Vargas
2022-10-12  2:53 ` [PATCH v3 29/30] baseband/acc100: add workaround for deRM corner cases Hernan Vargas
2022-10-13 13:09   ` [EXT] " Akhil Goyal
2022-10-12  2:53 ` [PATCH v3 30/30] baseband/acc100: configure PMON control registers Hernan Vargas
2022-10-13  8:28 ` [EXT] [PATCH v3 00/30] baseband/acc100: changes for 22.11 Akhil Goyal
2022-10-13 13:01 ` Akhil Goyal
2022-10-14  2:46   ` Chautru, Nicolas
2022-10-14  6:33     ` Akhil Goyal [this message]

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=CO6PR18MB4484B538DC5AF0B5441EEAE0D8249@CO6PR18MB4484.namprd18.prod.outlook.com \
    --to=gakhil@marvell.com \
    --cc=dev@dpdk.org \
    --cc=hernan.vargas@intel.com \
    --cc=maxime.coquelin@redhat.com \
    --cc=nicolas.chautru@intel.com \
    --cc=qi.z.zhang@intel.com \
    --cc=trix@redhat.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).