From: Akhil Goyal <gakhil@marvell.com>
To: Suanming Mou <suanmingm@nvidia.com>, Matan Azrad <matan@nvidia.com>
Cc: "dev@dpdk.org" <dev@dpdk.org>
Subject: RE: [EXTERNAL] [PATCH v2 1/2] crypto/mlx5: optimize AES-GCM IPsec operation
Date: Fri, 14 Jun 2024 09:06:45 +0000 [thread overview]
Message-ID: <CO6PR18MB4484E735E99A9AC18F18A531D8C22@CO6PR18MB4484.namprd18.prod.outlook.com> (raw)
In-Reply-To: <CO6PR12MB5396E66376E408B9D1F68D10C1C22@CO6PR12MB5396.namprd12.prod.outlook.com>
> Hi Akhil,
>
> > -----Original Message-----
> > From: Akhil Goyal <gakhil@marvell.com>
> > Sent: Friday, June 14, 2024 2:49 PM
> > To: Suanming Mou <suanmingm@nvidia.com>; Matan Azrad
> > <matan@nvidia.com>
> > Cc: dev@dpdk.org
> > Subject: RE: [EXTERNAL] [PATCH v2 1/2] crypto/mlx5: optimize AES-GCM IPsec
> > operation
> >
> > > To optimize AES-GCM IPsec operation within crypto/mlx5, the DPDK API
> > > typically supplies AES_GCM AAD/Payload/Digest in separate locations,
> > > potentially disrupting their contiguous layout. In cases where the
> > > memory layout fails to meet hardware (HW) requirements, an UMR WQE is
> > > initiated ahead of the GCM's GGA WQE to establish a continuous
> > > AAD/Payload/Digest virtual memory space for the HW MMU.
> > >
> > > For IPsec scenarios, where the memory layout consistently adheres to
> > > the fixed order of AAD/IV/Payload/Digest, directly shrinking memory
> > > for AAD proves more efficient than preparing a UMR WQE. To address
> > > this, a new devarg "crypto_mode" with mode "ipsec_opt" is introduced
> > > in the commit, offering an optimization hint specifically for IPsec
> > > cases. When enabled, the PMD copies AAD directly before Payload in the
> > > enqueue_burst function instead of employing the UMR WQE. Subsequently,
> > > in the dequeue_burst function, the overridden IV before Payload is
> > > restored from the GGA WQE. It's crucial for users to avoid utilizing
> > > the input mbuf data during processing.
> >
> > This seems very specific to mlx5 and is not as per the expectations of cryptodev
> > APIs.
> >
> > It seems you are asking to alter the user application to accommodate this to
> > support IPsec.
> >
> > Cryptodev APIs are for generic crypto processing of data as defined in
> > rte_crypto_op.
> > With your proposed changes, it seems the behavior of the crypto APIs will be
> > different in case of mlx5 which I believe is not correct.
> >
> > Is it not possible for you to use rte_security IPsec path?
> >
>
> Sorry I don't understand why that conflicts the API, IIUC crypto API only just
> defines the AAD/Payload/Digest in struct rte_crypto_sym_op, but not restrict the
> sequence, and AAD/Payload/Digest may come from difference memory space.
> Am I missing something here?
Yes you are correct that there is no restriction there.
> The input requirements from mlx5 HW is AAD/Payload/Digest sequence, if the
> input memory of AAD/Payload/Digest does not meet the requirements, PMD will
> try to combine the memory address space with UMR WQE as that commit does
> by software shrink.
And here, you are adding a restriction for IPsec case.
I believe you need a way to identify IPsec case with non-ipsec case in data path.
For that, instead of using a devarg(which is a specific case for mlx5),
you can use generic rte_security session with action type RTE_SECURITY_ACTION_TYPE_NONE.
You may also benefit from rte_ipsec library APIs and test framework,
for processing of protocol specific things which are specifically written
for RTE_SECURITY_ACTION_TYPE_NONE case.
> And the most important thing is that "ipsec_opt" is not mandatory, only if user
> have such case of layout and allows that optimization happens. Otherwise, the
> existing UMR WQE will still be the default behavior here.
>
With this new devarg which application would you be using for testing?
I do not see a patch for application changes for the layout that you are mentioning.
next prev parent reply other threads:[~2024-06-14 9:06 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-30 7:24 [PATCH 0/2] " Suanming Mou
2024-05-30 7:24 ` [PATCH 1/2] " Suanming Mou
2024-05-30 7:24 ` [PATCH 2/2] crypto/mlx5: add out of place mode for " Suanming Mou
2024-06-13 6:44 ` [PATCH 0/2] crypto/mlx5: optimize AES-GCM " Suanming Mou
2024-06-13 18:02 ` Akhil Goyal
2024-06-14 0:30 ` Suanming Mou
2024-06-14 0:30 ` [PATCH v2 " Suanming Mou
2024-06-14 0:30 ` [PATCH v2 1/2] " Suanming Mou
2024-06-14 6:49 ` [EXTERNAL] " Akhil Goyal
2024-06-14 7:15 ` Suanming Mou
2024-06-14 9:06 ` Akhil Goyal [this message]
2024-06-14 9:32 ` Suanming Mou
2024-06-18 6:47 ` Suanming Mou
2024-06-20 7:40 ` Akhil Goyal
2024-06-20 8:16 ` Suanming Mou
2024-06-20 9:06 ` Akhil Goyal
2024-06-20 9:41 ` Suanming Mou
2024-06-24 8:27 ` Akhil Goyal
2024-06-24 8:41 ` Suanming Mou
2024-06-24 8:44 ` Akhil Goyal
2024-06-24 8:52 ` Suanming Mou
2024-06-14 0:30 ` [PATCH v2 2/2] crypto/mlx5: add out of place mode for " Suanming Mou
2024-06-24 9:16 ` [PATCH v3 0/2] crypto/mlx5: optimize AES-GCM " Suanming Mou
2024-06-24 9:16 ` [PATCH v3 1/2] " Suanming Mou
2024-06-24 9:16 ` [PATCH v3 2/2] crypto/mlx5: add out of place mode for " Suanming Mou
2024-06-26 6:49 ` [EXTERNAL] [PATCH v3 0/2] crypto/mlx5: optimize AES-GCM " Akhil Goyal
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