From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from na01-bn1-obe.outbound.protection.outlook.com (mail-bn1bbn0102.outbound.protection.outlook.com [157.56.111.102]) by dpdk.org (Postfix) with ESMTP id E69D46A87 for ; Mon, 9 Mar 2015 02:54:08 +0100 (CET) Received: from CY1PR0301MB0684.namprd03.prod.outlook.com (25.160.158.155) by CY1PR0301MB0683.namprd03.prod.outlook.com (25.160.158.153) with Microsoft SMTP Server (TLS) id 15.1.106.15; Mon, 9 Mar 2015 01:54:07 +0000 Received: from CY1PR0301MB0684.namprd03.prod.outlook.com ([25.160.158.155]) by CY1PR0301MB0684.namprd03.prod.outlook.com ([25.160.158.155]) with mapi id 15.01.0106.007; Mon, 9 Mar 2015 01:54:07 +0000 From: Xuelin Shi To: Bruce Richardson Thread-Topic: [PATCH] librte_lpm: define tbl entry reversely for big endian Thread-Index: AQHQVkwTRHBXawDUCUCXZrIO3df0uZ0MJNaAgAEAhACAAis3AIAEGhUQ Date: Mon, 9 Mar 2015 01:54:06 +0000 Message-ID: References: <1425450852-24837-1-git-send-email-xuelin.shi@freescale.com> <20150304104815.GF1468@bricha3-MOBL3> <20150306111332.GB9352@bricha3-MOBL3> In-Reply-To: <20150306111332.GB9352@bricha3-MOBL3> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [123.151.195.51] authentication-results: intel.com; dkim=none (message not signed) header.d=none; x-microsoft-antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:CY1PR0301MB0683; x-forefront-antispam-report: BMV:1; SFV:NSPM; SFS:(10019020)(6009001)(13464003)(164054003)(51704005)(24454002)(87936001)(46102003)(2656002)(2900100001)(66066001)(15975445007)(102836002)(2950100001)(19580405001)(19580395003)(86362001)(15395725005)(99286002)(106116001)(74316001)(76576001)(93886004)(122556002)(110136001)(92566002)(50986999)(76176999)(62966003)(54356999)(40100003)(77156002)(33656002)(1150200001); DIR:OUT; SFP:1102; SCL:1; SRVR:CY1PR0301MB0683; H:CY1PR0301MB0684.namprd03.prod.outlook.com; FPR:; SPF:None; MLV:sfv; LANG:en; x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:; x-exchange-antispam-report-cfa-test: BCL:0; PCL:0; RULEID:(601004)(5002009)(5005006); SRVR:CY1PR0301MB0683; BCL:0; PCL:0; RULEID:; SRVR:CY1PR0301MB0683; x-forefront-prvs: 05102978A2 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: freescale.com X-MS-Exchange-CrossTenant-originalarrivaltime: 09 Mar 2015 01:54:06.6527 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 710a03f5-10f6-4d38-9ff4-a80b81da590d X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY1PR0301MB0683 Cc: "dev@dpdk.org" Subject: Re: [dpdk-dev] [PATCH] librte_lpm: define tbl entry reversely for big endian X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 09 Mar 2015 01:54:09 -0000 Hi Bruce, Yes, the patch http://dpdk.org/dev/patchwork/patch/3132/ should be abandone= d. Thanks, Shi xuelin > -----Original Message----- > From: Bruce Richardson [mailto:bruce.richardson@intel.com] > Sent: Friday, March 06, 2015 19:14 > To: Shi Xuelin-B29237 > Cc: thomas.monjalon@6wind.com; dev@dpdk.org > Subject: Re: [PATCH] librte_lpm: define tbl entry reversely for big > endian >=20 > On Thu, Mar 05, 2015 at 02:12:12AM +0000, Xuelin Shi wrote: > > Hi Bruce, > > > > Yes, it needs to swap the fields. The bit field is first identified as > the uint8_t and then packed. > > > > Thanks, > > Shi xuelin > > > Am I right in thinking that this patch set supercedes that for > "lpm: use field access instead of type conversion" > http://dpdk.org/dev/patchwork/patch/3132/ ? >=20 > > > -----Original Message----- > > > From: Bruce Richardson [mailto:bruce.richardson@intel.com] > > > Sent: Wednesday, March 04, 2015 18:48 > > > To: Shi Xuelin-B29237 > > > Cc: thomas.monjalon@6wind.com; dev@dpdk.org > > > Subject: Re: [PATCH] librte_lpm: define tbl entry reversely for big > > > endian > > > > > > On Wed, Mar 04, 2015 at 02:34:12PM +0800, xuelin.shi@freescale.com > wrote: > > > > From: Xuelin Shi > > > > > > > > This module uses type conversion between struct and int. > > > > Also truncation and comparison is used with this int. > > > > It is not safe for different endian arch. > > > > > > > > Add ifdef for big endian struct to fix this issue. > > > > > > > > Signed-off-by: Xuelin Shi > > > > --- > > > > lib/librte_lpm/rte_lpm.h | 19 +++++++++++++++++++ > > > > 1 file changed, 19 insertions(+) > > > > > > > > diff --git a/lib/librte_lpm/rte_lpm.h b/lib/librte_lpm/rte_lpm.h > > > > index > > > > 1af150c..08a2859 100644 > > > > --- a/lib/librte_lpm/rte_lpm.h > > > > +++ b/lib/librte_lpm/rte_lpm.h > > > > @@ -96,6 +96,7 @@ extern "C" { > > > > /** Bitmask used to indicate successful lookup */ > > > > #define RTE_LPM_LOOKUP_SUCCESS 0x0100 > > > > > > > > +#if RTE_BYTE_ORDER =3D=3D RTE_LITTLE_ENDIAN > > > > /** @internal Tbl24 entry structure. */ struct > rte_lpm_tbl24_entry { > > > > /* Stores Next hop or group index (i.e. gindex)into tbl8. */ > @@ > > > > -117,6 +118,24 @@ struct rte_lpm_tbl8_entry { > > > > uint8_t valid_group :1; /**< Group validation flag. */ > > > > uint8_t depth :6; /**< Rule depth. */ > > > > }; > > > > +#else > > > > +struct rte_lpm_tbl24_entry { > > > > + uint8_t depth :6; > > > > + uint8_t ext_entry :1; > > > > + uint8_t valid :1; > > > > > > Since endianness only refers to the order of bytes within a word, do > > > the bitfields within the uint8_t really need to be swapped around too= ? > > > > > > /Bruce > > > > > > > > > + union { > > > > + uint8_t tbl8_gindex; > > > > + uint8_t next_hop; > > > > + }; > > > > +}; > > > > + > > > > +struct rte_lpm_tbl8_entry { > > > > + uint8_t depth :6; > > > > + uint8_t valid_group :1; > > > > + uint8_t valid :1; > > > > + uint8_t next_hop; > > > > +}; > > > > +#endif > > > > > > > > /** @internal Rule structure. */ > > > > struct rte_lpm_rule { > > > > -- > > > > 1.9.1 > > > >