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Tue, 26 Jun 2018 11:21:21 +0000 From: "Verma, Shally" To: "De Lara Guarch, Pablo" CC: "Trahe, Fiona" , "akhil.goyal@nxp.com" , "dev@dpdk.org" , "Athreya, Narayana Prasad" , "Sahu, Sunila" , "Gupta, Ashish" Thread-Topic: [PATCH v3 2/6] lib/cryptodev: add asym op support in cryptodev Thread-Index: AQHUDS7wspbOIMgKaka6YS2ChmLWhaRyZTBQ Date: Tue, 26 Jun 2018 11:21:21 +0000 Message-ID: References: <1526450713-17299-1-git-send-email-shally.verma@caviumnetworks.com> <1526450713-17299-3-git-send-email-shally.verma@caviumnetworks.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=Shally.Verma@cavium.com; x-originating-ip: [115.113.156.2] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1; CY4PR0701MB3636; 7:rd0E83KSKRYCsrxnIN3EbP8iTQ1+5gcMhiPOBiqiMLu5Ub5CsofP2m5cRdkUq8lOF4G1p8ECI3n/6dyPE+l8UxLMe2t02P7HZ1+3tEdZWDUzzlmo2B/eOXnhsh9utj62053yB57YTJJq77n71O6W3tbIjUvKMziGBvdlRPj+9UGUCEmxrg/qQP9UJuAvaArzR3CAX8hySGY33cV0V+lIuG9AL1dNqywGJQTI13/MseBDQxsSOq6oC+Isj7lZ10n2 x-ms-exchange-antispam-srfa-diagnostics: SOS;SOR; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: cavium.com X-MS-Exchange-CrossTenant-Network-Message-Id: a2e8c843-f734-4cf8-a2ca-08d5db56f234 X-MS-Exchange-CrossTenant-originalarrivaltime: 26 Jun 2018 11:21:21.6777 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 711e4ccf-2e9b-4bcf-a551-4094005b6194 X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY4PR0701MB3636 Subject: Re: [dpdk-dev] [PATCH v3 2/6] lib/cryptodev: add asym op support in cryptodev X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 26 Jun 2018 11:21:25 -0000 Ack. Thanks Shally >-----Original Message----- >From: De Lara Guarch, Pablo [mailto:pablo.de.lara.guarch@intel.com] >Sent: 26 June 2018 14:50 >To: Verma, Shally >Cc: Trahe, Fiona ; akhil.goyal@nxp.com; dev@dpdk.or= g; Athreya, Narayana Prasad >; Sahu, Sunila = ; Gupta, Ashish >Subject: RE: [PATCH v3 2/6] lib/cryptodev: add asym op support in cryptode= v > >External Email > >Hi Shally, > >> -----Original Message----- >> From: Shally Verma [mailto:shally.verma@caviumnetworks.com] >> Sent: Wednesday, May 16, 2018 7:05 AM >> To: De Lara Guarch, Pablo >> Cc: Trahe, Fiona ; akhil.goyal@nxp.com; >> dev@dpdk.org; pathreya@caviumnetworks.com; Sunila Sahu >> ; Ashish Gupta >> >> Subject: [PATCH v3 2/6] lib/cryptodev: add asym op support in cryptodev >> >> Extend DPDK librte_cryptodev to: >> - define asym op type in rte_crypto_op_type and associated >> op pool create/alloc APIs >> - define asym session and associated session APIs >> >> If PMD shows in its feature flag that it supports both sym and asym then= it must >> support those on all its qps. >> >> Changes from v2: >> - added rte_cryptodev_asym_session_set/get_private_data for app to setup >> private data in a session as per latest dpdk-next-crypto spec >> - rename rte_cryptodev_get_asym_session_private_size to be consistent wi= th >> other API names >> - correct rte_cryptodev_asym_session_create to pass void** to >> rte_mempool_get() and add for private_data_size flag >> >> Changes from v1 >> - resolve new line error in librte_cryptodev/rte_cryptodev_version.m= ap >> >> Signed-off-by: Shally Verma >> Signed-off-by: Sunila Sahu >> Signed-off-by: Ashish Gupta > >... > >> +int __rte_experimental >> +rte_cryptodev_asym_session_init(uint8_t dev_id, >> + struct rte_cryptodev_asym_session *sess, >> + struct rte_crypto_asym_xform *xforms, >> + struct rte_mempool *mp) >> +{ >> + struct rte_cryptodev *dev; >> + uint8_t index; >> + int ret; >> + >> + dev =3D rte_cryptodev_pmd_get_dev(dev_id); >> + >> + if (sess =3D=3D NULL || xforms =3D=3D NULL || dev =3D=3D NULL) >> + return -EINVAL; >> + >> + index =3D dev->driver_id; >> + > >Check if asym_session_configure is implemented in the device, like this: > >RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->asym_session_configure, -ENOTSUP); > >This way, there won't be a segmentation fault when using a device that >does not support asymmetric operations. > >> + if (sess->sess_private_data[index] =3D=3D NULL) { >> + ret =3D dev->dev_ops->asym_session_configure(dev, >> + xforms, >> + sess, mp); >> + if (ret < 0) { >> + CDEV_LOG_ERR( >> + "dev_id %d failed to configure session det= ails", >> + dev_id); >> + return ret; > >... > >> +int __rte_experimental >> +rte_cryptodev_asym_session_clear(uint8_t dev_id, >> + struct rte_cryptodev_asym_session *sess) { >> + struct rte_cryptodev *dev; >> + >> + dev =3D rte_cryptodev_pmd_get_dev(dev_id); >> + >> + if (dev =3D=3D NULL || sess =3D=3D NULL) >> + return -EINVAL; >> + > >Same as above, add the following. > >RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->asym_session_clear, -ENOTSUP); > >> + dev->dev_ops->asym_session_clear(dev, sess); >> + >> + return 0; >> +} > >I will send a patch doing the same for symmetric. > >Pablo