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From: "Xu, Ting" <ting.xu@intel.com>
To: "Dumitrescu, Cristian" <cristian.dumitrescu@intel.com>, "dev@dpdk.org"
 <dev@dpdk.org>
CC: "stable@dpdk.org" <stable@dpdk.org>
Thread-Topic: [PATCH v3] lib/table: fix cache alignment issue
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Subject: Re: [dpdk-dev] [PATCH v3] lib/table: fix cache alignment issue
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Hi, Cristian

> -----Original Message-----
> From: Dumitrescu, Cristian <cristian.dumitrescu@intel.com>
> Sent: Monday, July 20, 2020 10:38 PM
> To: Xu, Ting <ting.xu@intel.com>; dev@dpdk.org
> Cc: stable@dpdk.org
> Subject: RE: [PATCH v3] lib/table: fix cache alignment issue
>=20
>=20
>=20
> > -----Original Message-----
> > From: Xu, Ting <ting.xu@intel.com>
> > Sent: Thursday, July 9, 2020 2:48 AM
> > To: dev@dpdk.org
> > Cc: Dumitrescu, Cristian <cristian.dumitrescu@intel.com>; Xu, Ting
> > <ting.xu@intel.com>; stable@dpdk.org
> > Subject: [PATCH v3] lib/table: fix cache alignment issue
> >
> > When create softnic hash table with 16 keys, it failed on 32bit
> > environment because of the structure rte_bucket_4_16 alignment issue.
> > Add __rte_cache_aligned to ensure correct cache align.
> >
> > Fixes: 8aa327214c ("table: hash")
> > Cc: stable@dpdk.org
> >
> > Signed-off-by: Ting Xu <ting.xu@intel.com>
> >
> > ---
> > v2->v3: Rebase
> > v1->v2: Correct patch time
> > ---
> >  lib/librte_table/rte_table_hash_key16.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/lib/librte_table/rte_table_hash_key16.c
> > b/lib/librte_table/rte_table_hash_key16.c
> > index 2cca1c924..5e1665c15 100644
> > --- a/lib/librte_table/rte_table_hash_key16.c
> > +++ b/lib/librte_table/rte_table_hash_key16.c
> > @@ -44,7 +44,7 @@ struct rte_bucket_4_16 {
> >  	uint64_t key[4][2];
> >
> >  	/* Cache line 2 */
> > -	uint8_t data[0];
> > +	uint8_t data[0] __rte_cache_aligned;
> >  };
> >
> >  struct rte_table_hash {
> > --
> > 2.17.1
>=20
> Hi Ting,
>=20
> This fix is breaking the execution for systems with cache line of 128 byt=
es, as
> typically (on 64-bit systems) this structure would be 64-byte in size and
> adding the __rte_cache_aligned would force doubling the size of this
> structure through padding enforced by the compiler.
>=20
> Can you please confirm this is caused by check below failing in the table
> create function:
> 	sizeof(struct rte_bucket_4_16) % 64) !=3D 0
>=20

The result of sizeof(struct rte_bucket_4_16) is 124 byte in this case, and =
this is the direct reason causing this failure.

> Since all the other fields in this data structure are explicitly declared=
 as 64-bit
> fields, due to the alignment rules I was expecting the compiler to add a =
32-bit
> padding field after the "next" field, which is a pointer that would only =
take 32
> bits on 32-bit systems. I am not sure why this did not take place in your=
 case,
> any thoughts?
>=20

It shows that the size of the field struct rte_bucket_4_16 *next in struct =
rte_bucket_4_16 is only 32 bits. And there is no padding added by the compi=
ler in my and the reporter's case.
I tried to add a 32 bits pad field after the field next manually, and the r=
esult is correct then.
Is it because in 32-bit system, the compiler will not extend the 32 bits po=
inter to 64 bits, since the 32 bits size has already matched the cache line=
?

> Not sure why we would run Soft NIC on 32-bit systems, might be better to
> disable Soft NIC for 32-bit systems.
>=20

To be honest, I do not know why we should run softnic on 32-bit system, I w=
as just assigned this specific bug. It seems there is a complete test case =
for validation team to test softnic in 32-bit system.
I am not sure is it OK to tell the validation team that we should disable s=
oftnic in 32-bit system now. Or we should fix this issue this time and disc=
uss about the problem later?

Thanks!

> Thanks,
> Cristian