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Mon, 23 Apr 2018 06:37:24 +0000 From: "Kumar, Ravi1" To: Thomas Monjalon , "pablo.de.lara.guarch@intel.com" CC: "dev@dpdk.org" , "hemant.agrawal@nxp.com" Thread-Topic: [dpdk-dev] [PATCH v5 01/19] crypto/ccp: add AMD ccp skeleton PMD Thread-Index: AQHTv305XuozmHHfdk2fX65nCgzdJaQNaVqAgACytLA= Date: Mon, 23 Apr 2018 06:37:24 +0000 Message-ID: References: <1520584520-130522-1-git-send-email-Ravi1.kumar@amd.com> <1521462233-13590-1-git-send-email-Ravi1.kumar@amd.com> <1612190.ovG0FycYX0@xps> In-Reply-To: <1612190.ovG0FycYX0@xps> Accept-Language: en-IN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: monjalon.net; dkim=none (message not signed) header.d=none;monjalon.net; dmarc=none action=none header.from=amd.com; x-originating-ip: [202.56.249.162] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1; CY4PR12MB1784; 7:uUxPSqslVQqYKRAJ/QL8oeUUfxYyTaEj+4Dr9kl84DqYe/TxUbGyvlST4pufdhzk+8w+qJ962hUkUKCHcN44sUJxtiXexD4SSOGXjchs2d4K/20sxi93tl2/W5OhUTuzwwyZTc4nhIhD2UhyCjMoTLCGWdSbMg3usUKQWyerf/1euaA/saSx22kDC6mGqyTs3SPUMh7A1uNspjLYzQabkpbQDP0dNKiaI6+X/IYIOQ8WaGMqRTvDzCN+ABIPaMro; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Office365-Filtering-Correlation-Id: 8b019225-e4a7-44d0-9c4d-08d5a8e4ac6d X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 8b019225-e4a7-44d0-9c4d-08d5a8e4ac6d X-MS-Exchange-CrossTenant-originalarrivaltime: 23 Apr 2018 06:37:24.0573 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY4PR12MB1784 Subject: Re: [dpdk-dev] [PATCH v5 01/19] crypto/ccp: add AMD ccp skeleton PMD X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 23 Apr 2018 06:37:25 -0000 >Hi, > >19/03/2018 13:23, Ravi Kumar: >> --- a/config/common_base >> +++ b/config/common_base >> @@ -529,6 +529,11 @@ CONFIG_RTE_LIBRTE_PMD_CRYPTO_SCHEDULER_DEBUG=3Dn >> CONFIG_RTE_LIBRTE_PMD_NULL_CRYPTO=3Dy >> =20 >> # >> +# Compile PMD for AMD CCP crypto device # CONFIG_RTE_LIBRTE_PMD_CCP=3Dn > >Why is it disabled by default? > Hi Thomas, The CCP HW crypto engines are available only on specific AMD platforms. That is why we let the user decide when to enable. Regards, Ravi