From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by dpdk.org (Postfix) with ESMTP id EC58E1B524 for ; Thu, 12 Jul 2018 03:22:30 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 11 Jul 2018 18:22:26 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,339,1526367600"; d="scan'208";a="71627952" Received: from orsmsx101.amr.corp.intel.com ([10.22.225.128]) by fmsmga001.fm.intel.com with ESMTP; 11 Jul 2018 18:22:14 -0700 Received: from orsmsx111.amr.corp.intel.com (10.22.240.12) by ORSMSX101.amr.corp.intel.com (10.22.225.128) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 11 Jul 2018 18:22:13 -0700 Received: from orsmsx105.amr.corp.intel.com ([169.254.2.59]) by ORSMSX111.amr.corp.intel.com ([169.254.12.141]) with mapi id 14.03.0319.002; Wed, 11 Jul 2018 18:22:13 -0700 From: "Wang, Yipeng1" To: Stephen Hemminger CC: "De Lara Guarch, Pablo" , "dev@dpdk.org" , "Richardson, Bruce" , "honnappa.nagarahalli@arm.com" , "vguvva@caviumnetworks.com" , "brijesh.s.singh@gmail.com" , "Wang, Ren" , "Gobriel, Sameh" , "Tai, Charlie" Thread-Topic: [dpdk-dev] [PATCH v5 5/8] hash: add read and write concurrency support Thread-Index: AQHUGVilFq5i3KUZRESqgFJIrUczUaSKySgw Date: Thu, 12 Jul 2018 01:22:12 +0000 Message-ID: References: <1528455078-328182-1-git-send-email-yipeng1.wang@intel.com> <1531242001-381104-1-git-send-email-yipeng1.wang@intel.com> <1531242001-381104-6-git-send-email-yipeng1.wang@intel.com> <20180711134907.01d8eaf0@xeon-e3> In-Reply-To: <20180711134907.01d8eaf0@xeon-e3> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.0.200.100 dlp-reaction: no-action x-ctpclassification: CTP_NT x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiYzg4ZGU1NDgtOWQ0Ni00ODgyLWExNjAtYTBiZDdjOGZlMzBjIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiZU9SWGVYUEdhSXpDWXJpeU9qR1wvc1pVTW8xVzROSHk0RVwvZWY2c1JSdEdac2h3RVcxa1NFb3lJNTQwVlJBQitGIn0= x-originating-ip: [10.22.254.138] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v5 5/8] hash: add read and write concurrency support X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 12 Jul 2018 01:22:32 -0000 Hi, Stephen, You are correct and we understand that spinlock might be slightly faster th= an counter based rwlock in this case. However, the counter based rwlock is = the exception path when TSX fails. If performance of this exception path is a big concern, a more optimal read= -write lock scheme (e.g. TLRW) should be introduced into rte_rwlock in the = future. Thanks Yipeng >-----Original Message----- >From: Stephen Hemminger [mailto:stephen@networkplumber.org] > >For small windows, reader-writer locks are slower than a spin lock >because there are more cache bounces.