From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 35D63A0487 for ; Thu, 4 Jul 2019 02:52:43 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 0675E1E20; Thu, 4 Jul 2019 02:52:41 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id 8C7A11D9E; Thu, 4 Jul 2019 02:52:39 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 03 Jul 2019 17:52:37 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,449,1557212400"; d="scan'208";a="191218750" Received: from orsmsx106.amr.corp.intel.com ([10.22.225.133]) by fmsmga002.fm.intel.com with ESMTP; 03 Jul 2019 17:52:37 -0700 Received: from orsmsx156.amr.corp.intel.com (10.22.240.22) by ORSMSX106.amr.corp.intel.com (10.22.225.133) with Microsoft SMTP Server (TLS) id 14.3.439.0; Wed, 3 Jul 2019 17:52:36 -0700 Received: from orsmsx104.amr.corp.intel.com ([169.254.4.70]) by ORSMSX156.amr.corp.intel.com ([169.254.8.198]) with mapi id 14.03.0439.000; Wed, 3 Jul 2019 17:52:36 -0700 From: "Wang, Yipeng1" To: Honnappa Nagarahalli , "Gobriel, Sameh" , "Richardson, Bruce" , "De Lara Guarch, Pablo" CC: "Gavin Hu (Arm Technology China)" , "Ruifeng Wang (Arm Technology China)" , "dev@dpdk.org" , nd , "stable@dpdk.org" , nd Thread-Topic: [PATCH 3/3] lib/hash: adjust tbl_chng_cnt position Thread-Index: AQHVK5s55vvDD43NqUGOv7TOTcEYOaaxauRQgAao14CAAZfKsA== Date: Thu, 4 Jul 2019 00:52:35 +0000 Message-ID: References: <20190625211520.43181-1-honnappa.nagarahalli@arm.com> <20190625211520.43181-4-honnappa.nagarahalli@arm.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.0.600.7 dlp-reaction: no-action x-ctpclassification: CTP_NT x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiYjk1ODlkODQtMzg3Yy00YmVjLTgyMDAtMmM5MmE3ZGExMmE5IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiZXp2UlwvM2JxSUZxZWtERlhRQlZIQXpqN1ZySE9JdE9yME9HMXVCMzVPVGpnRUorNUZoTk53cnJUVmIrblhMSkUifQ== x-originating-ip: [10.22.254.140] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH 3/3] lib/hash: adjust tbl_chng_cnt position X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" >-----Original Message----- >From: Honnappa Nagarahalli [mailto:Honnappa.Nagarahalli@arm.com] >Sent: Tuesday, July 2, 2019 10:23 AM >To: Wang, Yipeng1 ; Gobriel, Sameh ; Richardson, Bruce >; De Lara Guarch, Pablo >Cc: Gavin Hu (Arm Technology China) ; Ruifeng Wang (Arm = Technology China) ; >dev@dpdk.org; Honnappa Nagarahalli ; nd ; stable@dpdk.org; nd >Subject: RE: [PATCH 3/3] lib/hash: adjust tbl_chng_cnt position > > > >> > >> >tbl_chng_cnt is one of the first elements of the structure used in the >> >lookup. Move it to the beginning of the cache line to gain performance. >> > >> >Fixes: e605a1d36 ("hash: add lock-free r/w concurrency") >> >Cc: stable@dpdk.org >> > >> >Signed-off-by: Honnappa Nagarahalli >> >Reviewed-by: Gavin Hu >> >Tested-by: Ruifeng Wang >> >--- >> > lib/librte_hash/rte_cuckoo_hash.h | 6 +++--- >> > 1 file changed, 3 insertions(+), 3 deletions(-) >> > >> >diff --git a/lib/librte_hash/rte_cuckoo_hash.h >> >b/lib/librte_hash/rte_cuckoo_hash.h >> >index fb19bb27d..af6451b5c 100644 >> >--- a/lib/librte_hash/rte_cuckoo_hash.h >> >+++ b/lib/librte_hash/rte_cuckoo_hash.h >> >@@ -170,7 +170,9 @@ struct rte_hash { >> > >> > /* Fields used in lookup */ >> > >> >- uint32_t key_len __rte_cache_aligned; >> >+ uint32_t *tbl_chng_cnt __rte_cache_aligned; >> >+ /**< Indicates if the hash table changed from last read. */ >> >+ uint32_t key_len; >> > /**< Length of hash key. */ >> > uint8_t hw_trans_mem_support; >> > /**< If hardware transactional memory is used. */ @@ -218,8 +220,6 >> @@ >> >struct rte_hash { >> > * is piggy-backed to freeing of the key index. >> > */ >> > uint32_t *ext_bkt_to_free; >> >- uint32_t *tbl_chng_cnt; >> >- /**< Indicates if the hash table changed from last read. */ >> > } __rte_cache_aligned; >> > >> > struct queue_node { >> >-- >> >2.17.1 >> >> [Wang, Yipeng] >> I am not sure about this change. By moving counter to front, I think you >> seems push key_store out of the cache line. And key_store Is also used i= n >> lookup (and more commonly). >> My tests also show perf drop in many cases. >I ran hash_readwrite_lf tests and L3 fwd application. Both of them showed = improvements for both lock-free and using locks for Arm >platforms (L3 fwd was not run on x86). Which tests are resulting in perfor= mance drops for you? > >But, I do agree that this work is not complete. We can drop this patch and= take this up separately. [Wang, Yipeng]=20 I run the LF test on x86. For 1 reader case it seems a clear improvement fo= r lookup without key-shifts. Other results are a mixed bag even for lock-free. For most HTM it is a drop. My opinion is to delay similar fine tuning effort tied to architecture spec= s.=20