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Tue, 23 Aug 2016 10:01:56 +0000 From: Hemant Agrawal To: Jerin Jacob , "dev@dpdk.org" CC: "thomas.monjalon@6wind.com" , "jianbo.liu@linaro.org" , "viktorin@rehivetech.com" Thread-Topic: [dpdk-dev] [PATCH] eal/armv8: high-resolution cycle counter Thread-Index: AQHR+Ub8Pc0o2NP0ekKHntTivRFgfaBWV8vg Date: Tue, 23 Aug 2016 10:01:55 +0000 Message-ID: References: <1471521090-21067-1-git-send-email-jerin.jacob@caviumnetworks.com> In-Reply-To: <1471521090-21067-1-git-send-email-jerin.jacob@caviumnetworks.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=hemant.agrawal@nxp.com; x-originating-ip: [192.88.169.1] x-ms-office365-filtering-correlation-id: 2719569a-684c-4ca8-eadd-08d3cb3c83ec x-microsoft-exchange-diagnostics: 1; DB5PR04MB1605; 6:EVwn8Q1oc8MT40ons8Wy6MOkoeqg7eDGNL7AZXmENXzJDf8ukgZBAHsc2Ulc1xJkTwgotSGHBPhBSGEKCpG4AUo++rzYlmsM9dnuaX3ZFg2W7iGF1h7fWU6kJb5c3kka3RgyMtmQHeR18U5S/e3XNgPsFGNGS6PWNIYmsYSBu0gNUHLjDRVK98ZC4g4TWEhFrt+wMFlSBjFDOarX3WElqmnZN2ZBz+yLjGHJE7ZJoOEI4322DrE+fvYTmkIJo5x5dw++NgwUulLv89TB3vP7up8igh+qqGDYDVY/oueXMMOIYnETY+DVF90vk8ih96pZiaatcB1T/yUjUW7rfc/arA==; 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DIR:OUT; SFP:1101; SCL:1; SRVR:DB5PR04MB1605; H:DB5PR04MB1605.eurprd04.prod.outlook.com; FPR:; SPF:None; PTR:InfoNoRecords; MX:1; A:1; LANG:en; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-originalarrivaltime: 23 Aug 2016 10:01:55.9178 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB5PR04MB1605 Subject: Re: [dpdk-dev] [PATCH] eal/armv8: high-resolution cycle counter X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 23 Aug 2016 10:01:58 -0000 > -----Original Message----- > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Jerin Jacob > Sent: Thursday, August 18, 2016 5:22 PM > To: dev@dpdk.org > Cc: thomas.monjalon@6wind.com; jianbo.liu@linaro.org; > viktorin@rehivetech.com; Jerin Jacob > Subject: [dpdk-dev] [PATCH] eal/armv8: high-resolution cycle counter >=20 > Existing cntvct_el0 based rte_rdtsc() provides portable means to get wall= clock > counter at user space. Typically it runs at <=3D 100MHz. >=20 > The alternative method to enable rte_rdtsc() for high resolution wall clo= ck > counter is through armv8 PMU subsystem. > The PMU cycle counter runs at CPU frequency, However, access to PMU cycle > counter from user space is not enabled by default in the arm64 linux kern= el. > It is possible to enable cycle counter at user space access by configurin= g the > PMU from the privileged mode (kernel space). >=20 > by default rte_rdtsc() implementation uses portable > cntvct_el0 scheme. Application can choose the PMU based implementation wi= th > CONFIG_RTE_ARM_EAL_RDTSC_USE_PMU >=20 > Signed-off-by: Jerin Jacob Acked-by: Hemant Agrawal