From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from EUR04-HE1-obe.outbound.protection.outlook.com (mail-eopbgr70083.outbound.protection.outlook.com [40.107.7.83]) by dpdk.org (Postfix) with ESMTP id EB3472D13 for ; Sun, 28 Oct 2018 14:55:47 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Mellanox.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=pH6k8Sg5mxeI7xJ0SOKtxtXylEoOI3F2Gf8fyKcvNcQ=; b=aAA/3fQnI96MMcgu99bCLBEKsPriTlBXODurAqGl6n1g3dCr8FVXuA+3JNjWVPHgdryQhL+wiURPoV40Jd0be8nvZ87TYR9fBodAvdC3JAjsVEBKc/BEaehRLrL+ouIPwAueZy1jNbnMSkagW/B/hDgfeQ7tdvuxmA661gPfF14= Received: from DB7PR05MB4426.eurprd05.prod.outlook.com (52.134.109.15) by DB7PR05MB4876.eurprd05.prod.outlook.com (20.176.235.96) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1273.25; Sun, 28 Oct 2018 13:55:46 +0000 Received: from DB7PR05MB4426.eurprd05.prod.outlook.com ([fe80::80e:e6b:baf2:d973]) by DB7PR05MB4426.eurprd05.prod.outlook.com ([fe80::80e:e6b:baf2:d973%3]) with mapi id 15.20.1273.025; Sun, 28 Oct 2018 13:55:46 +0000 From: Shahaf Shuler To: Yongseok Koh CC: "dev@dpdk.org" Thread-Topic: [PATCH] net/mlx5: add 128B padding of Rx completion entry Thread-Index: AQHUbCtR4rz5iE2dJkCT/GSNE39qEKU0s2Ig Date: Sun, 28 Oct 2018 13:55:46 +0000 Message-ID: References: <20181025062351.10135-1-yskoh@mellanox.com> In-Reply-To: <20181025062351.10135-1-yskoh@mellanox.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=shahafs@mellanox.com; x-originating-ip: [193.47.165.251] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1; DB7PR05MB4876; 6:6/SRM+8sv7lk6kD3Y8iXOBHPgWPPo/DL1H8UcMgeLsosav8nc84vsLDmEstoC71xFuqAbDaxTbCxqTTRikeUbsFxtcA1wXgq4SbKvlJERFPVYgnlwG0vvL96F3CRarUETS0ya8fps4UMcDh8alMw0WWnZ8Nx+8T+sBnpwnvEmjIuxI7h2aftbPnDVkJtYfQy3L3nU/sWE7IhitubuZDHBYHM2eBATJfHfXJzICc/t2qLMv3lACpYoH1rELvDgOMKkBbmBKGaOXwj6qJeArZ9yXx9VkwOt8XwuWojCfMTc93s7pp6RYf6ChLhgRP5YTNTkDvDerN5lBJwIVyFhkzuFVM4e0yESFMXsSzsrUzH79JnkFFur48v7bmfMKil0gtCwbToEW5ZHHqJKVdOIq2RsEjcSMeBfbIA8zJtpQDdWLzksTYIycAaR9AJzKnxnAYWIUzeCmN2jFqwFUulK/iaZw==; 5:SgKPZ9t/BZv9biekRezJ5e2CuVSgdHEF2c+OD/DetEmf66R5RlUxsqCIEGISek/A0FtnEWR3oj2bpbUpxsMeXPY/i81xhvRcKfdYX0GxRTBvyBDXDVQtiL73nao01daOvR7ufMWm7IT5SSaSfDkcvqqzMHom7UToKu0wdJA1JxA=; 7:YVr9kSZuqC/QA9X2febZFLTgFUMPPykjOdWMWB2OMMPXhsu6DdOLT06GCqz/KYA2YSPlu+l140Jfd78ILKlefnzNjhfVb3m2nOBFvejKUFZYiu00YpUf6AqOEjGNRuUSLSXVO/fRnsjNXWSAaxnKew== x-ms-exchange-antispam-srfa-diagnostics: SOS; x-ms-office365-filtering-correlation-id: 9df1a368-a86d-492e-2d72-08d63cdd0f8a x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; PCL:0; RULEID:(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600074)(711020)(4618075)(2017052603328)(7153060)(7193020); SRVR:DB7PR05MB4876; x-ms-traffictypediagnostic: DB7PR05MB4876: x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:; x-ms-exchange-senderadcheck: 1 x-exchange-antispam-report-cfa-test: BCL:0; PCL:0; RULEID:(8211001083)(6040522)(2401047)(5005006)(8121501046)(10201501046)(3002001)(3231382)(944501410)(52105095)(93006095)(93001095)(6055026)(148016)(149066)(150057)(6041310)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(20161123558120)(20161123562045)(20161123560045)(20161123564045)(201708071742011)(7699051)(76991095); SRVR:DB7PR05MB4876; BCL:0; PCL:0; RULEID:; SRVR:DB7PR05MB4876; x-forefront-prvs: 0839D067E7 x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(39860400002)(396003)(376002)(366004)(136003)(346002)(199004)(189003)(2900100001)(7696005)(76176011)(71190400001)(97736004)(9686003)(71200400001)(6246003)(102836004)(6636002)(53936002)(66066001)(229853002)(55016002)(316002)(6436002)(6506007)(33656002)(14444005)(256004)(68736007)(446003)(186003)(3846002)(478600001)(5660300001)(5250100002)(81156014)(106356001)(25786009)(26005)(8936002)(86362001)(2906002)(305945005)(7736002)(81166006)(486006)(74316002)(6116002)(99286004)(105586002)(8676002)(14454004)(11346002)(4326008)(476003)(6862004); DIR:OUT; SFP:1101; SCL:1; SRVR:DB7PR05MB4876; H:DB7PR05MB4426.eurprd05.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: mellanox.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: C/6gKOYlJdYwCsYK2TtfuAN5T2rcBrycKKEhsEJDihYb18zL0efL4I39EeNSCzJLMCFS5zu/Gic+SsJwRhdWBCogrNrQCBiMNXNvBjh1Mhni3K434KwM9yjHPSDokkoi6LwfsxB+U5zp2XVQw7M96czD3NEMzCHpPvbaVV2sdF7EqZt7tkzncxs6Njsg94e+BKDoY3UhEB5/avB098tYCLdjTwXLHpN4fp3j63Y12fWeX4i6JEE0jD7PykNHUiHC8w1xNZswRp4+gcuMo7N0QzCpSZvxhxL4aVjNok2NI83TdC8bE/RDNq/Zd21iGGY9tXkCMS4XghywBZomFt72NNH1IASIyb9sDbk0wnZGOCo= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Mellanox.com X-MS-Exchange-CrossTenant-Network-Message-Id: 9df1a368-a86d-492e-2d72-08d63cdd0f8a X-MS-Exchange-CrossTenant-originalarrivaltime: 28 Oct 2018 13:55:46.4065 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: a652971c-7d2e-4d9b-a6a4-d149256f461b X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB7PR05MB4876 Subject: Re: [dpdk-dev] [PATCH] net/mlx5: add 128B padding of Rx completion entry X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 28 Oct 2018 13:55:48 -0000 Thursday, October 25, 2018 9:24 AM, Yongseok Koh: > Subject: [PATCH] net/mlx5: add 128B padding of Rx completion entry >=20 > A PMD parameter (rxq_cqe_pad_en) is added to enable 128B padding of > CQE on RX side. The size of CQE is aligned with the size of a cacheline o= f the > core. If cacheline size is 128B, the CQE size is configured to be 128B ev= en > though the device writes only 64B data on the cacheline. This is to avoid > unnecessary cache invalidation by device's two consecutive writes on to o= ne > cacheline. However in some architecture, it is more beneficial to update > entire cacheline with padding the rest 64B rather than striding because r= ead- > modify-write could drop performance a lot. On the other hand, writing ext= ra > data will consume more PCIe bandwidth and could also drop the maximum > throughput. It is recommended to empirically set this parameter. Disabled= by > default. >=20 > Signed-off-by: Yongseok Koh Applied to next-net-mlx, thanks.=20