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CTRY:IE; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:64aa7808-outbound-1.mta.getcheckrecipient.com; PTR:ec2-63-35-35-123.eu-west-1.compute.amazonaws.com; CAT:NONE; SFS:(4636009)(36840700001)(46966006)(26005)(9686003)(316002)(5660300002)(8936002)(356005)(110136005)(186003)(8676002)(81166007)(52536014)(70206006)(36860700001)(336012)(70586007)(83380400001)(54906003)(82310400003)(7696005)(47076005)(4326008)(33656002)(6506007)(2906002)(86362001)(921005)(55016002)(508600001); DIR:OUT; SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Nov 2021 22:11:54.3667 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 42edb310-875a-4969-f991-08d9a3cdf045 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM5EUR03FT020.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAXPR08MB6350 Subject: Re: [dpdk-dev] [PATCH v1 08/12] app/crypto: use compiler atomic builtins for display sync X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" >=20 > Covert rte_atomic_test_and_set usage to compiler atomic CAS operation for ^^^^^^ Convert > display sync in crypto cases. >=20 > Signed-off-by: Joyce Kong > Reviewed-by: Ruifeng Wang With the above typo fixed, Reviewed-by: Honnappa Nagarahalli > --- > app/test-crypto-perf/cperf_test_latency.c | 6 ++++-- > app/test-crypto-perf/cperf_test_pmd_cyclecount.c | 9 ++++++--- > app/test-crypto-perf/cperf_test_throughput.c | 9 ++++++--- > app/test-crypto-perf/cperf_test_verify.c | 9 ++++++--- > 4 files changed, 22 insertions(+), 11 deletions(-) >=20 > diff --git a/app/test-crypto-perf/cperf_test_latency.c b/app/test-crypto- > perf/cperf_test_latency.c > index 159fe8492b..5e73c75fba 100644 > --- a/app/test-crypto-perf/cperf_test_latency.c > +++ b/app/test-crypto-perf/cperf_test_latency.c > @@ -126,7 +126,7 @@ cperf_latency_test_runner(void *arg) > uint8_t burst_size_idx =3D 0; > uint32_t imix_idx =3D 0; >=20 > - static rte_atomic16_t display_once =3D RTE_ATOMIC16_INIT(0); > + static uint16_t display_once; >=20 > if (ctx =3D=3D NULL) > return 0; > @@ -308,7 +308,9 @@ cperf_latency_test_runner(void *arg) > time_min =3D tunit*(double)(tsc_min) / tsc_hz; >=20 > if (ctx->options->csv) { > - if (rte_atomic16_test_and_set(&display_once)) > + uint16_t exp =3D 0; > + if (__atomic_compare_exchange_n(&display_once, > &exp, 1, 0, > + __ATOMIC_RELAXED, > __ATOMIC_RELAXED)) > printf("\n# lcore, Buffer Size, Burst Size, Pakt > Seq #, " > "cycles, time (us)"); >=20 > diff --git a/app/test-crypto-perf/cperf_test_pmd_cyclecount.c b/app/test- > crypto-perf/cperf_test_pmd_cyclecount.c > index 844659aeca..a1de334efb 100644 > --- a/app/test-crypto-perf/cperf_test_pmd_cyclecount.c > +++ b/app/test-crypto-perf/cperf_test_pmd_cyclecount.c > @@ -404,7 +404,7 @@ cperf_pmd_cyclecount_test_runner(void *test_ctx) > state.lcore =3D rte_lcore_id(); > state.linearize =3D 0; >=20 > - static rte_atomic16_t display_once =3D RTE_ATOMIC16_INIT(0); > + static uint16_t display_once; > static bool warmup =3D true; >=20 > /* > @@ -449,8 +449,10 @@ cperf_pmd_cyclecount_test_runner(void *test_ctx) > continue; > } >=20 > + uint16_t exp =3D 0; > if (!opts->csv) { > - if (rte_atomic16_test_and_set(&display_once)) > + if (__atomic_compare_exchange_n(&display_once, > &exp, 1, 0, > + __ATOMIC_RELAXED, > __ATOMIC_RELAXED)) > printf(PRETTY_HDR_FMT, "lcore id", "Buf > Size", > "Burst Size", "Enqueued", > "Dequeued", "Enq Retries", > @@ -466,7 +468,8 @@ cperf_pmd_cyclecount_test_runner(void *test_ctx) > state.cycles_per_enq, > state.cycles_per_deq); > } else { > - if (rte_atomic16_test_and_set(&display_once)) > + if (__atomic_compare_exchange_n(&display_once, > &exp, 1, 0, > + __ATOMIC_RELAXED, > __ATOMIC_RELAXED)) > printf(CSV_HDR_FMT, "# lcore id", "Buf Size", > "Burst Size", "Enqueued", > "Dequeued", "Enq Retries", > diff --git a/app/test-crypto-perf/cperf_test_throughput.c b/app/test-cryp= to- > perf/cperf_test_throughput.c > index f6eb8cf259..1407007c6e 100644 > --- a/app/test-crypto-perf/cperf_test_throughput.c > +++ b/app/test-crypto-perf/cperf_test_throughput.c > @@ -106,7 +106,7 @@ cperf_throughput_test_runner(void *test_ctx) > uint8_t burst_size_idx =3D 0; > uint32_t imix_idx =3D 0; >=20 > - static rte_atomic16_t display_once =3D RTE_ATOMIC16_INIT(0); > + static uint16_t display_once; >=20 > struct rte_crypto_op *ops[ctx->options->max_burst_size]; > struct rte_crypto_op *ops_processed[ctx->options->max_burst_size]; > @@ -272,8 +272,10 @@ cperf_throughput_test_runner(void *test_ctx) > double cycles_per_packet =3D ((double)tsc_duration / > ctx->options->total_ops); >=20 > + uint16_t exp =3D 0; > if (!ctx->options->csv) { > - if (rte_atomic16_test_and_set(&display_once)) > + if (__atomic_compare_exchange_n(&display_once, > &exp, 1, 0, > + __ATOMIC_RELAXED, > __ATOMIC_RELAXED)) >=20 > printf("%12s%12s%12s%12s%12s%12s%12s%12s%12s%12s\n\n", > "lcore id", "Buf Size", "Burst Size", > "Enqueued", "Dequeued", "Failed > Enq", @@ -293,7 +295,8 @@ cperf_throughput_test_runner(void *test_ctx) > throughput_gbps, > cycles_per_packet); > } else { > - if (rte_atomic16_test_and_set(&display_once)) > + if (__atomic_compare_exchange_n(&display_once, > &exp, 1, 0, > + __ATOMIC_RELAXED, > __ATOMIC_RELAXED)) > printf("#lcore id,Buffer Size(B)," > "Burst > Size,Enqueued,Dequeued,Failed Enq," > "Failed > Deq,Ops(Millions),Throughput(Gbps)," > diff --git a/app/test-crypto-perf/cperf_test_verify.c b/app/test-crypto- > perf/cperf_test_verify.c > index 2939aeaa93..0c053ad3c0 100644 > --- a/app/test-crypto-perf/cperf_test_verify.c > +++ b/app/test-crypto-perf/cperf_test_verify.c > @@ -241,7 +241,7 @@ cperf_verify_test_runner(void *test_ctx) > uint64_t ops_deqd =3D 0, ops_deqd_total =3D 0, ops_deqd_failed =3D 0; > uint64_t ops_failed =3D 0; >=20 > - static rte_atomic16_t display_once =3D RTE_ATOMIC16_INIT(0); > + static uint16_t display_once; >=20 > uint64_t i; > uint16_t ops_unused =3D 0; > @@ -383,8 +383,10 @@ cperf_verify_test_runner(void *test_ctx) > ops_deqd_total +=3D ops_deqd; > } >=20 > + uint16_t exp =3D 0; > if (!ctx->options->csv) { > - if (rte_atomic16_test_and_set(&display_once)) > + if (__atomic_compare_exchange_n(&display_once, &exp, 1, > 0, > + __ATOMIC_RELAXED, __ATOMIC_RELAXED)) >=20 > printf("%12s%12s%12s%12s%12s%12s%12s%12s\n\n", > "lcore id", "Buf Size", "Burst size", > "Enqueued", "Dequeued", "Failed Enq", @@ - > 401,7 +403,8 @@ cperf_verify_test_runner(void *test_ctx) > ops_deqd_failed, > ops_failed); > } else { > - if (rte_atomic16_test_and_set(&display_once)) > + if (__atomic_compare_exchange_n(&display_once, &exp, 1, > 0, > + __ATOMIC_RELAXED, __ATOMIC_RELAXED)) > printf("\n# lcore id, Buffer Size(B), " > "Burst Size,Enqueued,Dequeued,Failed Enq," > "Failed Deq,Failed Ops\n"); > -- > 2.17.1