From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id F3035A04C7; Tue, 15 Sep 2020 00:52:09 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id AABB1FFA; Tue, 15 Sep 2020 00:52:08 +0200 (CEST) Received: from EUR04-DB3-obe.outbound.protection.outlook.com (mail-eopbgr60061.outbound.protection.outlook.com [40.107.6.61]) by dpdk.org (Postfix) with ESMTP id 39F78160 for ; Tue, 15 Sep 2020 00:52:07 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=doRHiP7QDTXP41r3JYESXHHYHz6RRTSziNEiYhBftaw=; b=i0TDea8wPfT09jYiEKsma37fcLZBgsLEF0Hwrbti+wpwOJIKxosf0fioXF48bys64yGFeECPgXN+45fXvofgtKI1/jhAD+Akh2jCckWGrmI/su+yNYWQFnU4xR+3s26fil0fJXECdWuLL7dtOE3OvbsGeal5xqnpv57gUsATf+I= Received: from DB6PR0501CA0014.eurprd05.prod.outlook.com (2603:10a6:4:8f::24) by DB6PR0802MB2198.eurprd08.prod.outlook.com (2603:10a6:4:84::20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3370.16; Mon, 14 Sep 2020 22:52:04 +0000 Received: from DB5EUR03FT015.eop-EUR03.prod.protection.outlook.com (2603:10a6:4:8f:cafe::a) by DB6PR0501CA0014.outlook.office365.com (2603:10a6:4:8f::24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3370.16 via Frontend Transport; Mon, 14 Sep 2020 22:52:04 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 63.35.35.123) smtp.mailfrom=arm.com; dpdk.org; dkim=pass (signature was verified) header.d=armh.onmicrosoft.com;dpdk.org; dmarc=bestguesspass action=none header.from=arm.com; Received-SPF: Pass (protection.outlook.com: domain of arm.com designates 63.35.35.123 as permitted sender) receiver=protection.outlook.com; client-ip=63.35.35.123; helo=64aa7808-outbound-1.mta.getcheckrecipient.com; Received: from 64aa7808-outbound-1.mta.getcheckrecipient.com (63.35.35.123) by DB5EUR03FT015.mail.protection.outlook.com (10.152.20.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3370.16 via Frontend Transport; Mon, 14 Sep 2020 22:52:04 +0000 Received: ("Tessian outbound 7a6fb63c1e64:v64"); Mon, 14 Sep 2020 22:52:04 +0000 X-CR-MTA-TID: 64aa7808 Received: from faeb32e0b2a9.3 by 64aa7808-outbound-1.mta.getcheckrecipient.com id 855D46DE-7F16-4063-845B-4B6EDD15EB59.1; Mon, 14 Sep 2020 22:51:59 +0000 Received: from EUR01-HE1-obe.outbound.protection.outlook.com by 64aa7808-outbound-1.mta.getcheckrecipient.com with ESMTPS id faeb32e0b2a9.3 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384); Mon, 14 Sep 2020 22:51:59 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=WulH1hIvaSmnsGnzOOBV+QzvW1bd1xQKbsL91iwsJvDw2n4aTloGO84CTxQJOvzFj/n/pbSlEkNbxKpEozo1KcZS9ctorr5gVbBFTz1UtxAKaS2MMn8KkZL7q6oR3e7spSzifzzIUDNvBAe+eEus1PWuubHdDhdsL3ChzvFwNcDDeQ2tGCrYFOkfNVPkFpiJc6np/VxYKNijdHme6xK7zQA3C8UCHWhWrRq4Gkf5oFFCHYCK+Db54PKSZq80ETg86JmNZUf4KQBmQIBw4bPhBaWYRMB2ASqtq09nmibSJn03XmZZ4S28/rsvoN+6BCpsenUqsFV7Mw/FYDWNANILuw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=doRHiP7QDTXP41r3JYESXHHYHz6RRTSziNEiYhBftaw=; b=UJgG23bdDbYq1E5eiTWuJbERH94UdcdVcHzonatr9GQ1Jh2zmgVvF8f9837Me8NwO8LwvfdJPUle0RLIryrHWJ1ky7FzH3feiLk9T7+rN3G1G1PV6F1AitYSi+EPQYI+e27MoKYCYusCsqX7YcWjhcZYQkZmtTOOEdznMiTDEeSxkn99kDmTqCvJdJkzU+vVDfsp/EZNaw6WIkauLM+UwzMNmB0Ae80wE+KKQxZzutquUYa/uXv1eS1z2tZ+kVUma1BycMX0OAJgmJr51Nvkgnu51e2aCqBkSvwRfmd3xL73/xkIStp4Iv6XJ+zcZEa23yGJEADhFRjJ0BbqHLOnzw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=arm.com; dmarc=pass action=none header.from=arm.com; dkim=pass header.d=arm.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=doRHiP7QDTXP41r3JYESXHHYHz6RRTSziNEiYhBftaw=; b=i0TDea8wPfT09jYiEKsma37fcLZBgsLEF0Hwrbti+wpwOJIKxosf0fioXF48bys64yGFeECPgXN+45fXvofgtKI1/jhAD+Akh2jCckWGrmI/su+yNYWQFnU4xR+3s26fil0fJXECdWuLL7dtOE3OvbsGeal5xqnpv57gUsATf+I= Received: from DBAPR08MB5814.eurprd08.prod.outlook.com (2603:10a6:10:1b1::6) by DBBPR08MB4444.eurprd08.prod.outlook.com (2603:10a6:10:c4::20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3370.16; Mon, 14 Sep 2020 22:51:54 +0000 Received: from DBAPR08MB5814.eurprd08.prod.outlook.com ([fe80::408a:40fb:7402:c805]) by DBAPR08MB5814.eurprd08.prod.outlook.com ([fe80::408a:40fb:7402:c805%6]) with mapi id 15.20.3370.019; Mon, 14 Sep 2020 22:51:53 +0000 From: Honnappa Nagarahalli To: Phil Yang , "dev@dpdk.org" CC: Ruifeng Wang , Joyce Kong , nd , John McNamara , Marko Kovacevic , Jan Viktorin , Ruifeng Wang , "jerinj@marvell.com" , David Christensen , Bruce Richardson , Konstantin Ananyev , Honnappa Nagarahalli , nd Thread-Topic: [PATCH v2 2/2] eal: remove RTE CIO barriers Thread-Index: AQHWh/wv6AQ5/OP+00+/i7VKLzVmXqlowwnQ Date: Mon, 14 Sep 2020 22:51:53 +0000 Message-ID: References: <1598258441-15696-1-git-send-email-phil.yang@arm.com> <1599801997-19880-1-git-send-email-phil.yang@arm.com> <1599801997-19880-3-git-send-email-phil.yang@arm.com> In-Reply-To: <1599801997-19880-3-git-send-email-phil.yang@arm.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ts-tracking-id: FF84E960C9AFD34AB6542B4AAE9CD10E.0 x-checkrecipientchecked: true Authentication-Results-Original: arm.com; dkim=none (message not signed) header.d=none;arm.com; dmarc=none action=none header.from=arm.com; x-originating-ip: [107.77.221.143] x-ms-publictraffictype: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: 35f503f5-c21f-4ebe-c963-08d85900cced x-ms-traffictypediagnostic: DBBPR08MB4444:|DB6PR0802MB2198: x-ld-processed: f34e5979-57d9-4aaa-ad4d-b122a662184d,ExtAddr x-ms-exchange-transport-forked: True X-Microsoft-Antispam-PRVS: x-checkrecipientrouted: true nodisclaimer: true x-ms-oob-tlc-oobclassifiers: OLM:9508;OLM:9508; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam-Untrusted: BCL:0; X-Microsoft-Antispam-Message-Info-Original: slXYg/U4fJ4LvH87vy4NwO0VEivX56DczJ9Ewb/2QLGzXzwaZvKuKCotFcl770DmWTKrsp2PW8osQvZ6v0+dS+KsZqaXoNrXO/tM+KbN1WaaUlc/mY5P2dD4Y1gn7jh/tIWDyDPMvrwPOVBMfP+iDQU2cqZ+sHStNB4V4OjmlN8lC4TbwuANjRiSPOc0Kl2oVgT7zix7ksA6afjAX1FiHrB2eza9BntKMK4YjSCAgbkHITvKvAhqcNh/TlvuQMTF1o20D4HQcvd4wY6OT02w3xvbOU1hnS8KKukrTO/7KyFHB87fSaZpmUHUQTQyl+yP881c08lZo29snCMl0olIag== X-Forefront-Antispam-Report-Untrusted: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:DBAPR08MB5814.eurprd08.prod.outlook.com; PTR:; CAT:NONE; SFS:(4636009)(376002)(39860400002)(346002)(366004)(396003)(136003)(71200400001)(76116006)(5660300002)(8936002)(316002)(478600001)(55016002)(66556008)(33656002)(66446008)(52536014)(2906002)(64756008)(66946007)(186003)(4326008)(26005)(54906003)(66476007)(8676002)(110136005)(83380400001)(86362001)(6506007)(7696005)(9686003); DIR:OUT; SFP:1101; x-ms-exchange-antispam-messagedata: KBHVfVr6N98jXY8a+B++ahmehu0vMF9QBrLaDxJlUMvvj+0gtBivUu0aObfyAoS6uScm0iOJM+LmdK8wJhaW+3s0O1tpDVrcvnfSMTRJOf8R3zCgJg6w5NI+8SB30ZFUohi3TkVVeRT6D54q8LAxAhn8xbJdxx7I2SrhIWCZx0yREQ1juBMSQpPWmr+mn031tmVgpIx+f/8v2e8KqTQV5Pjq3xrE1FX2snd2qlmPPUDS0fvVIUCk3pIXqP4WBVou2ieK//pXcwpclKO7ftVr4IshZNpWxwye0YiSmzAhQmFd2rtDwEyZ+xu0d/kHKHFT7icO8ECKq2M60bmdGG6/YXpoPtp9zuFrMrZLsx+TLYspNGQklMCUjQyxNvL02nyIwpRQ3SsEOoQMm44uzasaWLaiqlL6L5WZZOglBAN64ZjB0IF/P/ZPn2gT5xXOewUmsYVbGN0oBCjQ9hoQWdFa5KIqiFnOtSXdkzv2omMbIsMAR6+QfX4Rjtrui3h5ARVZjbu4aGpDBUJEwDHuzfObOQkJmNR/VLzWsrAmPG6Sh4E5sZIOiN8ATXamTj0eYWfC6sSRdBx85SLen5gatJfikoNQyF6ojoM7rvj9ImMjfF9zBKhpqpwXVoBh83LR58P/e0+PjlPghrffAE4TUVN5nA== Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DBBPR08MB4444 Original-Authentication-Results: arm.com; dkim=none (message not signed) header.d=none;arm.com; dmarc=none action=none header.from=arm.com; X-EOPAttributedMessage: 0 X-MS-Exchange-Transport-CrossTenantHeadersStripped: DB5EUR03FT015.eop-EUR03.prod.protection.outlook.com X-MS-Office365-Filtering-Correlation-Id-Prvs: a9221543-15ec-4c9f-5781-08d85900c65f X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: gvdTDmnRXzeAWNRJGnzXNgsGHaPiIve52+3ow3YOCDAHp9/ce9aN5TtC9RgmHSaKOB6No2Wp3UUxKUWzZ3TIf0ifGBaInY5YyOzW6RQ1cbT2xZT9b0Nchykm4fitnFpwtt+geNPYj4H4HmhmeHTnu3lCgZ2Wu/ZvpvZC5xHObFfyZVw0rKm4x9f/yhMo78BxsDpeB+e+TAR/PwJNGycpCoaBXrnX8yH0OGrcgrJAKZ6h/D++H7PlYHblw5dgK56/A6s3YKJrzjmujH3+eIBs0GPtKzBd8wnmXNxe1S2sbbkl/H1Yb0xos6WcooqR95pfuxGKVD1j49K+JKXv7IjI3PunjcGq1aijS9p2lJV7793Nl3YdTx/taEOCz4QKfN+CBbvkQFWFZhz5YH3wop6flA== X-Forefront-Antispam-Report: CIP:63.35.35.123; CTRY:IE; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:64aa7808-outbound-1.mta.getcheckrecipient.com; PTR:ec2-63-35-35-123.eu-west-1.compute.amazonaws.com; CAT:NONE; SFS:(4636009)(346002)(396003)(136003)(376002)(39860400002)(46966005)(8936002)(9686003)(7696005)(55016002)(26005)(6506007)(70586007)(70206006)(86362001)(54906003)(83380400001)(81166007)(356005)(478600001)(5660300002)(110136005)(52536014)(82740400003)(336012)(8676002)(316002)(82310400003)(47076004)(4326008)(186003)(33656002)(2906002); DIR:OUT; SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Sep 2020 22:52:04.5862 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 35f503f5-c21f-4ebe-c963-08d85900cced X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DB5EUR03FT015.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB6PR0802MB2198 Subject: Re: [dpdk-dev] [PATCH v2 2/2] eal: remove RTE CIO barriers X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" >=20 > Remove the deprecated rte_cio_[rw]mb APIs. >=20 > Signed-off-by: Phil Yang > Reviewed-by: Ruifeng Wang Reviewed-by: Honnappa Nagarahalli > --- > doc/guides/rel_notes/release_20_11.rst | 3 +++ > lib/librte_eal/arm/include/rte_atomic_32.h | 4 --- > lib/librte_eal/arm/include/rte_atomic_64.h | 4 --- > lib/librte_eal/include/generic/rte_atomic.h | 39 ------------------------= ----- > lib/librte_eal/ppc/include/rte_atomic.h | 4 --- > lib/librte_eal/x86/include/rte_atomic.h | 4 --- > 6 files changed, 3 insertions(+), 55 deletions(-) >=20 > diff --git a/doc/guides/rel_notes/release_20_11.rst > b/doc/guides/rel_notes/release_20_11.rst > index df227a1..7090caf 100644 > --- a/doc/guides/rel_notes/release_20_11.rst > +++ b/doc/guides/rel_notes/release_20_11.rst > @@ -84,6 +84,9 @@ API Changes > Also, make sure to start the actual text at the margin. > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D >=20 > +* eal: The ``rte_cio_rmb()`` and ``rte_cio_wmb()`` were deprecated > +since > + 20.08 and are removed in this release. > + >=20 > ABI Changes > ----------- > diff --git a/lib/librte_eal/arm/include/rte_atomic_32.h > b/lib/librte_eal/arm/include/rte_atomic_32.h > index 368f10c..9d0568d 100644 > --- a/lib/librte_eal/arm/include/rte_atomic_32.h > +++ b/lib/librte_eal/arm/include/rte_atomic_32.h > @@ -33,10 +33,6 @@ extern "C" { >=20 > #define rte_io_rmb() rte_rmb() >=20 > -#define rte_cio_wmb() rte_wmb() > - > -#define rte_cio_rmb() rte_rmb() > - > static __rte_always_inline void > rte_atomic_thread_fence(int memory_order) { diff --git > a/lib/librte_eal/arm/include/rte_atomic_64.h > b/lib/librte_eal/arm/include/rte_atomic_64.h > index 5cae52d..c518559 100644 > --- a/lib/librte_eal/arm/include/rte_atomic_64.h > +++ b/lib/librte_eal/arm/include/rte_atomic_64.h > @@ -37,10 +37,6 @@ extern "C" { >=20 > #define rte_io_rmb() rte_rmb() >=20 > -#define rte_cio_wmb() rte_wmb() > - > -#define rte_cio_rmb() rte_rmb() > - > static __rte_always_inline void > rte_atomic_thread_fence(int memory_order) { diff --git > a/lib/librte_eal/include/generic/rte_atomic.h > b/lib/librte_eal/include/generic/rte_atomic.h > index 95270f1..d1255b2 100644 > --- a/lib/librte_eal/include/generic/rte_atomic.h > +++ b/lib/librte_eal/include/generic/rte_atomic.h > @@ -107,45 +107,6 @@ static inline void rte_io_wmb(void); static inline > void rte_io_rmb(void); ///@} >=20 > -/** @name Coherent I/O Memory Barrier > - * > - * Coherent I/O memory barrier is a lightweight version of I/O memory > - * barriers which are system-wide data synchronization barriers. This > - * is for only coherent memory domain between lcore and I/O device but > - * it is same as the I/O memory barriers in most of architectures. > - * However, some architecture provides even lighter barriers which are > - * somewhere in between I/O memory barriers and SMP memory barriers. > - * For example, in case of ARMv8, DMB(data memory barrier) instruction > - * can have different shareability domains - inner-shareable and > - * outer-shareable. And inner-shareable DMB fits for SMP memory > - * barriers and outer-shareable DMB for coherent I/O memory barriers, > - * which acts on coherent memory. > - * > - * In most cases, I/O memory barriers are safer but if operations are > - * on coherent memory instead of incoherent MMIO region of a device, > - * then coherent I/O memory barriers can be used and this could bring > - * performance gain depending on architectures. > - */ > -///@{ > -/** > - * Write memory barrier for coherent memory between lcore and I/O > device > - * > - * Guarantees that the STORE operations on coherent memory that > - * precede the rte_cio_wmb() call are visible to I/O device before the > - * STORE operations that follow it. > - */ > -static inline void rte_cio_wmb(void); > - > -/** > - * Read memory barrier for coherent memory between lcore and I/O device > - * > - * Guarantees that the LOAD operations on coherent memory updated by > - * I/O device that precede the rte_cio_rmb() call are visible to CPU > - * before the LOAD operations that follow it. > - */ > -static inline void rte_cio_rmb(void); > -///@} > - > #endif /* __DOXYGEN__ */ >=20 > /** > diff --git a/lib/librte_eal/ppc/include/rte_atomic.h > b/lib/librte_eal/ppc/include/rte_atomic.h > index 527fcaf..a919899 100644 > --- a/lib/librte_eal/ppc/include/rte_atomic.h > +++ b/lib/librte_eal/ppc/include/rte_atomic.h > @@ -36,10 +36,6 @@ extern "C" { >=20 > #define rte_io_rmb() rte_rmb() >=20 > -#define rte_cio_wmb() rte_wmb() > - > -#define rte_cio_rmb() rte_rmb() > - > static __rte_always_inline void > rte_atomic_thread_fence(int memory_order) { diff --git > a/lib/librte_eal/x86/include/rte_atomic.h > b/lib/librte_eal/x86/include/rte_atomic.h > index 62ea393..b7d6b06 100644 > --- a/lib/librte_eal/x86/include/rte_atomic.h > +++ b/lib/librte_eal/x86/include/rte_atomic.h > @@ -79,10 +79,6 @@ rte_smp_mb(void) >=20 > #define rte_io_rmb() rte_compiler_barrier() >=20 > -#define rte_cio_wmb() rte_compiler_barrier() > - > -#define rte_cio_rmb() rte_compiler_barrier() > - > /** > * Synchronization fence between threads based on the specified memory > order. > * > -- > 2.7.4