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From: Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>
To: Ruifeng Wang <Ruifeng.Wang@arm.com>, Jerin Jacob <jerinjacobk@gmail.com>
Cc: "jerinj@marvell.com" <jerinj@marvell.com>,
	Jan Viktorin <viktorin@rehivetech.com>,
	Bruce Richardson <bruce.richardson@intel.com>,
	"dev@dpdk.org" <dev@dpdk.org>,
	"vladimir.medvedkin@intel.com" <vladimir.medvedkin@intel.com>,
	"hemant.agrawal@nxp.com" <hemant.agrawal@nxp.com>,
	nd <nd@arm.com>,
	Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>,
	nd <nd@arm.com>
Subject: Re: [dpdk-dev] [PATCH v2 5/5] config: add Arm Neoverse N2
Date: Mon, 11 Jan 2021 13:58:44 +0000
Message-ID: <DBAPR08MB581484398CE310DA11F049AC98AB0@DBAPR08MB5814.eurprd08.prod.outlook.com> (raw)
In-Reply-To: <VI1PR0802MB23516CD5BA27F71C9979EB7D9EAB0@VI1PR0802MB2351.eurprd08.prod.outlook.com>

<snip>

> > > >
> > > > + Juraj
> > > >
> > > > Please note that this clashes with Juraj's patch for meson rework.
> > >
> > > Yes. I didn't base it on the build options rework series.
> > > I will rebase when that series got merged.
> > > >
> > > > <snip>
> > > >
> > > > >
> > > > > Add Arm Neoverse N2 cpu support.
> > > > >
> > > > > Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
> > > > > ---
> > > > >  config/arm/arm64_n2_linux_gcc | 17 +++++++++++++++++
> > > > >  config/arm/meson.build        | 11 ++++++++++-
> > > > >  2 files changed, 27 insertions(+), 1 deletion(-)  create mode
> > > > > 100644 config/arm/arm64_n2_linux_gcc
> > > > >
> > > > > diff --git a/config/arm/arm64_n2_linux_gcc
> > > > > b/config/arm/arm64_n2_linux_gcc new file mode 100644 index
> > > > > 000000000..78f6f3e2b
> > > > > --- /dev/null
> > > > > +++ b/config/arm/arm64_n2_linux_gcc
> > > > > @@ -0,0 +1,17 @@
> > > > > +[binaries]
> > > > > +c = 'aarch64-linux-gnu-gcc'
> > > > > +cpp = 'aarch64-linux-gnu-cpp'
> > > > > +ar = 'aarch64-linux-gnu-gcc-ar'
> > > > > +strip = 'aarch64-linux-gnu-strip'
> > > > > +pkgconfig = 'aarch64-linux-gnu-pkg-config'
> > > > > +pcap-config = ''
> > > > > +
> > > > > +[host_machine]
> > > > > +system = 'linux'
> > > > > +cpu_family = 'aarch64'
> > > > > +cpu = 'armv8-a'
> > > > > +endian = 'little'
> > > > > +
> > > > > +[properties]
> > > > > +implementor_id = '0x41'
> > > > > +implementor_pn = '0xd49'
> > > > > diff --git a/config/arm/meson.build b/config/arm/meson.build
> > > > > index
> > > > > 42b4e43c7..58e0ae643 100644
> > > > > --- a/config/arm/meson.build
> > > > > +++ b/config/arm/meson.build
> > > > > @@ -89,6 +89,14 @@ flags_n1generic_extra = [
> > > > >     ['RTE_MAX_NUMA_NODES', 1],
> > > > >     ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false],
> > > > >     ['RTE_LIBRTE_VHOST_NUMA', false]]
> > > > > +flags_n2generic_extra = [
> > > > > +   ['RTE_MACHINE', '"neoverse-n2"'],
> > > > > +   ['RTE_MAX_LCORE', 64],
> > > > > +   ['RTE_CACHE_LINE_SIZE', 64],
> > > > > +   ['RTE_ARM_FEATURE_ATOMICS', true],
> > > > > +   ['RTE_USE_C11_MEM_MODEL', true],
> > > > > +   ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false],
> > > > > +   ['RTE_LIBRTE_VHOST_NUMA', false]]
> > > > Do we need a flag RTE_ARM_FEATURE_SVE?
> > >
> > > I don't think extra flag is needed. We can rely on __ARM_FEATURE_SVE
> > from compiler.
> > > One scenario I can think of where RTE_ARM_FEATURE_SVE can be needed
> > > is, when we are writing inline assembly with sve instructions and
> > > using
> > compiler that has no sve support.
> > > I'm not sure we will have sve inline assembly as C intrinsics are available.
> >
> > It may be useful to introduce RTE_ARM_FEATURE_SVE to abstract any
> > compiler difference in future(GCC vs clang or another tool chain etc).
> 
> According to Arm C Language Extension (ACLE) for SVE, preprocessor macros
> like __ARM_FEATURE_SVE are defined to indicate available features.
> GCC and clang have the macros defined. We can have RTE_ARM_FEATURE_SVE
> for some other tool chain that don't stick to ACLE. I'll add in next version.
The flag __ARM_FEATURE_SVE is a requirement from ACLE. If it is not defined, it is a bug in the compiler. Since, GCC/Clang define this flag, I am thinking we are fine without defining our own. It avoids checking for this additional flag in the code. We can always add it when we come across a toolchain that does not define this flag (or fix the toolchain).

BTW, this problem exists for __ARM_FEATURE_ATOMICS, it is not defined by Clang. Hence, we have RTE_ARM_FEATURE_ATOMICS. But, it is getting fixed in Clang.

> 
> >
> >
> > > >
> > > > >
> > > > >  machine_args_generic = [
> > > > >     ['default', ['-march=armv8-a+crc', '-moutline-atomics']], @@
> > > > > -100,7
> > > > > +108,8 @@ machine_args_generic = [
> > > > >     ['0xd09', ['-mcpu=cortex-a73']],
> > > > >     ['0xd0a', ['-mcpu=cortex-a75']],
> > > > >     ['0xd0b', ['-mcpu=cortex-a76']],
> > > > > -   ['0xd0c', ['-march=armv8.2-a+crypto', '-mcpu=neoverse-n1'],
> > > > > flags_n1generic_extra]]
> > > > > +   ['0xd0c', ['-march=armv8.2-a+crypto', '-mcpu=neoverse-n1'],
> > > > > flags_n1generic_extra],
> > > > > +   ['0xd49', ['-march=armv8.5-a+crypto+sve'],
> > > > > + flags_n2generic_extra]]
> > > > Should this be 'sve2'? There should be a flag to indicate SVE2.
> > >
> > > Yes. N2 supports sve2 and sve2 is superset of sve.
> > > I will do the change in next version.
> > > >
> > > > >
> > > > >  machine_args_cavium = [
> > > > >     ['default', ['-march=armv8-a+crc+crypto','-mcpu=thunderx']],
> > > > > --
> > > > > 2.25.1
> > >


  reply	other threads:[~2021-01-11 13:58 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-18 10:12 [dpdk-dev] [RFC PATCH] lpm: add sve support for lookup on Arm platform Ruifeng Wang
2021-01-05 15:44 ` Medvedkin, Vladimir
2021-01-06 10:11   ` Ruifeng Wang
2021-01-08  8:25 ` [dpdk-dev] [PATCH v2 0/5] lpm lookup with sve support Ruifeng Wang
2021-01-08  8:25   ` [dpdk-dev] [PATCH v2 1/5] lpm: add sve support for lookup on Arm platform Ruifeng Wang
2021-01-13 18:54     ` Medvedkin, Vladimir
2021-01-08  8:25   ` [dpdk-dev] [PATCH v2 2/5] net/hns3: fix build with sve enabled Ruifeng Wang
2021-01-09  0:06     ` Honnappa Nagarahalli
2021-01-09  2:11       ` oulijun
2021-01-11  2:39         ` Ruifeng Wang
2021-01-11 13:38           ` Honnappa Nagarahalli
2021-01-09  2:15     ` oulijun
2021-01-11  2:27       ` Ruifeng Wang
2021-01-08  8:25   ` [dpdk-dev] [PATCH v2 3/5] net/octeontx: " Ruifeng Wang
2021-01-08  8:25   ` [dpdk-dev] [PATCH v2 4/5] common/octeontx2: " Ruifeng Wang
2021-01-08 10:29     ` [dpdk-dev] [EXT] " Pavan Nikhilesh Bhagavatula
2021-01-11  9:51       ` Ruifeng Wang
2021-01-08  8:25   ` [dpdk-dev] [PATCH v2 5/5] config: add Arm Neoverse N2 Ruifeng Wang
2021-01-08 23:58     ` Honnappa Nagarahalli
2021-01-11  3:01       ` Ruifeng Wang
2021-01-11  3:09         ` Jerin Jacob
2021-01-11  8:32           ` Ruifeng Wang
2021-01-11 13:58             ` Honnappa Nagarahalli [this message]
2021-01-12  2:57 ` [dpdk-dev] [PATCH v3 0/5] lpm lookup with sve support Ruifeng Wang
2021-01-12  2:57   ` [dpdk-dev] [PATCH v3 1/5] lpm: add sve support for lookup on Arm platform Ruifeng Wang
2021-01-13 15:58     ` David Marchand
2021-01-27 13:04     ` David Marchand
2021-01-27 21:03       ` Honnappa Nagarahalli
2021-01-28  8:03         ` David Marchand
2021-01-28 12:24           ` Honnappa Nagarahalli
2021-01-28  5:47       ` Ruifeng Wang
2021-01-12  2:57   ` [dpdk-dev] [PATCH v3 2/5] net/hns3: fix build with sve enabled Ruifeng Wang
2021-01-13  2:16     ` Honnappa Nagarahalli
2021-01-12  2:57   ` [dpdk-dev] [PATCH v3 3/5] net/octeontx: " Ruifeng Wang
2021-01-12  4:39     ` Jerin Jacob
2021-01-12  2:57   ` [dpdk-dev] [PATCH v3 4/5] common/octeontx2: " Ruifeng Wang
2021-01-12  4:38     ` Jerin Jacob
2021-01-12  2:57   ` [dpdk-dev] [PATCH v3 5/5] config: add Arm Neoverse N2 Ruifeng Wang
2021-01-12  4:44     ` Jerin Jacob
2021-01-13  2:08     ` Honnappa Nagarahalli
2021-01-14 15:18   ` [dpdk-dev] [PATCH v3 0/5] lpm lookup with sve support David Marchand
2021-01-14 15:40     ` David Marchand
2021-01-15  7:02       ` Ruifeng Wang

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