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From: Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>
To: "Jakub Grajciar -X (jgrajcia - PANTHEON TECH SRO at Cisco)"
	<jgrajcia@cisco.com>, Phil Yang <Phil.Yang@arm.com>,
	"dev@dpdk.org" <dev@dpdk.org>
Cc: Ruifeng Wang <Ruifeng.Wang@arm.com>, nd <nd@arm.com>,
	Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>,
	nd <nd@arm.com>
Subject: Re: [dpdk-dev] [PATCH] net/memif: relax barrier for zero copy path
Date: Mon, 21 Sep 2020 19:28:16 +0000
Message-ID: <DBAPR08MB58149F08AD2873E9E168ADEA983A0@DBAPR08MB5814.eurprd08.prod.outlook.com> (raw)
In-Reply-To: <BYAPR11MB357473BBBD50761A5A2CB14ADF3A0@BYAPR11MB3574.namprd11.prod.outlook.com>

<snip>

> >
> > Hi Jakub,
> > 	I am trying to review this patch. I am having difficulty in
> > understanding the implementation for the queue/ring, appreciate if you
> > could help me understand the logic.
> 
> 'ring' refers to a ring buffer holding packet descriptors. These descriptors
> hold metadata about the packet (packet buffer address, length, etc..).
> 'queues' are a representation of rings and buffers  (+ some metadata). In
> more detail, one ring (S2M) and packet buffers allocated for this ring would
> be represented as 'tx queue' for the slave and 'rx queue' for the master.
Thanks Jakub. I could run the testpmd app and was able to understand the implementation. I found some issues and I have sent out a patch series [1].

[1] https://patches.dpdk.org/patch/78212/

> 
> >
> > 1) The S2M queues - are used to send packets from slave to master. My
> > understanding is that, the slave thread would call 'eth_memif_tx_zc'
> > and the master thread would call 'eth_memif_rx_zc'. Is this correct?
> > 2) The M2S queues - are used to send packets from master to slave.
> > Here the slave thread would call 'eth_memif_rx_zc' and the master
> > thread would call 'eth_memif_tx_zc'. Is this correct?
> 
> This is inded correct.
> 
> >
> > Thank you,
> > Honnappa
> >
> > > -----Original Message-----
> > > From: Phil Yang <phil.yang@arm.com>
> > > Sent: Friday, September 11, 2020 12:38 AM
> > > To: jgrajcia@cisco.com; dev@dpdk.org
> > > Cc: Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>; Ruifeng
> > > Wang <Ruifeng.Wang@arm.com>; nd <nd@arm.com>
> > > Subject: [PATCH] net/memif: relax barrier for zero copy path
> > >
> > > Using 'rte_mb' to synchronize the shared ring head/tail between
> > > producer and consumer will stall the pipeline and damage performance
> > > on the weak memory model platforms, such like aarch64.
> > >
> > > Relax the expensive barrier with c11 atomic with explicit memory
> > > ordering can improve 3.6% performance on throughput.
> 
> My question here is: `rte_mb` is supposed to make sure that head/tail
> pointer are not updated before the packets are written into shared memory.
> Does the atomic ensures that the packets are written into shared memory
> before head/tail pointers are updated?

      parent reply	other threads:[~2020-09-21 19:28 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-11  5:38 Phil Yang
2020-09-18 11:58 ` Ferruh Yigit
2020-09-18 22:49 ` Honnappa Nagarahalli
2020-09-21  9:03   ` Jakub Grajciar -X (jgrajcia - PANTHEON TECH SRO at Cisco)
2020-09-21 10:22     ` Phil Yang
2020-09-21 12:21       ` Jakub Grajciar -X (jgrajcia - PANTHEON TECH SRO at Cisco)
2020-09-21 13:27         ` Ferruh Yigit
2020-09-21 19:28     ` Honnappa Nagarahalli [this message]

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