From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <dev-bounces@dpdk.org>
Received: from dpdk.org (dpdk.org [92.243.14.124])
	by inbox.dpdk.org (Postfix) with ESMTP id 5B975A0521;
	Tue,  3 Nov 2020 06:33:00 +0100 (CET)
Received: from [92.243.14.124] (localhost [127.0.0.1])
	by dpdk.org (Postfix) with ESMTP id 9CE57BC66;
	Tue,  3 Nov 2020 06:32:58 +0100 (CET)
Received: from EUR04-DB3-obe.outbound.protection.outlook.com
 (mail-eopbgr60064.outbound.protection.outlook.com [40.107.6.64])
 by dpdk.org (Postfix) with ESMTP id 5793EBC62
 for <dev@dpdk.org>; Tue,  3 Nov 2020 06:32:56 +0100 (CET)
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; 
 s=selector2-armh-onmicrosoft-com;
 h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;
 bh=twE6YSSuzGIjUyIBVFTCPH0c53IG45ih5+X0XagT9BE=;
 b=9NGioEe7qdhvBvrZfBgGI5sm2r5QlY+FCkmBjtj8iMAQguQM3/q7o6PYD9JDdEmJcR+Ur5Qir+dAE7GCoabY5SfjaU/9bHsrUT8pH15lQq+oyT6lgM403GVUS67pEJJly2/749FcHutq3v/gmp3IpDvHgz9TlzHqfGLPd4JHaAQ=
Received: from AM6PR0202CA0044.eurprd02.prod.outlook.com
 (2603:10a6:20b:3a::21) by DB8PR08MB4025.eurprd08.prod.outlook.com
 (2603:10a6:10:a9::26) with Microsoft SMTP Server (version=TLS1_2,
 cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3499.30; Tue, 3 Nov
 2020 05:32:53 +0000
Received: from VE1EUR03FT037.eop-EUR03.prod.protection.outlook.com
 (2603:10a6:20b:3a:cafe::97) by AM6PR0202CA0044.outlook.office365.com
 (2603:10a6:20b:3a::21) with Microsoft SMTP Server (version=TLS1_2,
 cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3499.19 via Frontend
 Transport; Tue, 3 Nov 2020 05:32:53 +0000
X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 63.35.35.123)
 smtp.mailfrom=arm.com; dpdk.org; dkim=pass (signature was verified)
 header.d=armh.onmicrosoft.com;dpdk.org; dmarc=pass action=none
 header.from=arm.com;
Received-SPF: Pass (protection.outlook.com: domain of arm.com designates
 63.35.35.123 as permitted sender) receiver=protection.outlook.com;
 client-ip=63.35.35.123; helo=64aa7808-outbound-1.mta.getcheckrecipient.com;
Received: from 64aa7808-outbound-1.mta.getcheckrecipient.com (63.35.35.123) by
 VE1EUR03FT037.mail.protection.outlook.com (10.152.19.70) with
 Microsoft SMTP
 Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id
 15.20.3520.15 via Frontend Transport; Tue, 3 Nov 2020 05:32:53 +0000
Received: ("Tessian outbound e6c55a0b9ba9:v64");
 Tue, 03 Nov 2020 05:32:52 +0000
X-CR-MTA-TID: 64aa7808
Received: from 986e9de07c08.2
 by 64aa7808-outbound-1.mta.getcheckrecipient.com id
 4E289BB9-6DDA-4F58-A0BC-16617E236AB2.1; 
 Tue, 03 Nov 2020 05:32:47 +0000
Received: from EUR01-HE1-obe.outbound.protection.outlook.com
 by 64aa7808-outbound-1.mta.getcheckrecipient.com with ESMTPS id 986e9de07c08.2
 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384);
 Tue, 03 Nov 2020 05:32:47 +0000
ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none;
 b=ItDE8QTLqfORCqQyen4GQqm8w6Q28Jel76m0F1l6HXeaQKsZ23kwC2EQQsnAbSh1qfyYTzkYIBY/4yka+YJ+tzidqJxerA38cGWsGEp1iSyPKZrH4o2kxELWwl6Fu4R5+6rvEikP0rTah+sSZuKSH0sHfJW4un2a2A8fbg8Pv0X7IVt+YAwU8Aq/GenOc66sgOlrSY3IncPGEq7bBKJmkeSKIjehTz9Dcx0lM+qlr4uM5fAOaoeAYEBYzRxkfxoF3lUwgdbD0J03yoUQES1DxMd7klmbWAp/wJ3Pt0c+W4sDK1YX14P1V9eoHMK+cA3e0mC0U4G3A5ZEhmdIjWOWGA==
ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; 
 s=arcselector9901;
 h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;
 bh=twE6YSSuzGIjUyIBVFTCPH0c53IG45ih5+X0XagT9BE=;
 b=WucZ9YHtZcihxIvwH8Y8ys7xEr7nPc1IDywxbSw3w5nKP3DXjX5O9maYAXfc1FUqGKw+20SLS62sqTQVPjBAm5f+s7seoFPuQSLfPbOo+gSBwJpj+m10BtdVa3L4VDG+a8P6Sp13OsliLN/9kZiAiWD0Vsn8PZrI171Z4fDg03UpD8E2soGYnKl5xs4N6XTOOTZ/bMsa2u20jZ1dVM0y2MF4KjVmwVPDFd34BZy6v4ie29FQ6pbZJ7t0P7wCFLOZ0WJVI3fjrJcP46+1m9ZTKwtT0ZGzBh0lsErtekltE9/x2jeqTdITjAXcSRJFgQaJsfBwXYuFzXhzkK+8U0EjkA==
ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass
 smtp.mailfrom=arm.com; dmarc=pass action=none header.from=arm.com; dkim=pass
 header.d=arm.com; arc=none
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; 
 s=selector2-armh-onmicrosoft-com;
 h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;
 bh=twE6YSSuzGIjUyIBVFTCPH0c53IG45ih5+X0XagT9BE=;
 b=9NGioEe7qdhvBvrZfBgGI5sm2r5QlY+FCkmBjtj8iMAQguQM3/q7o6PYD9JDdEmJcR+Ur5Qir+dAE7GCoabY5SfjaU/9bHsrUT8pH15lQq+oyT6lgM403GVUS67pEJJly2/749FcHutq3v/gmp3IpDvHgz9TlzHqfGLPd4JHaAQ=
Received: from DBAPR08MB5814.eurprd08.prod.outlook.com (2603:10a6:10:1b1::6)
 by DB7PR08MB3611.eurprd08.prod.outlook.com (2603:10a6:10:4d::26) with
 Microsoft SMTP Server (version=TLS1_2,
 cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3499.29; Tue, 3 Nov
 2020 05:32:45 +0000
Received: from DBAPR08MB5814.eurprd08.prod.outlook.com
 ([fe80::7814:9c1:781f:475d]) by DBAPR08MB5814.eurprd08.prod.outlook.com
 ([fe80::7814:9c1:781f:475d%4]) with mapi id 15.20.3499.030; Tue, 3 Nov 2020
 05:32:45 +0000
From: Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>
To: Dharmik Thakkar <Dharmik.Thakkar@arm.com>
CC: Bruce Richardson <bruce.richardson@intel.com>, Vladimir Medvedkin
 <vladimir.medvedkin@intel.com>, "dev@dpdk.org" <dev@dpdk.org>, nd
 <nd@arm.com>, Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>, nd
 <nd@arm.com>
Thread-Topic: [dpdk-dev] [PATCH v2 4/4] test/lpm: avoid code duplication in
 rcu	qsbr perf
Thread-Index: AQHWsXOe/GYRfGhBrk+npnXu35aBe6m1ynWwgAAHkgCAAA3XkA==
Date: Tue, 3 Nov 2020 05:32:44 +0000
Message-ID: <DBAPR08MB5814E84FF71977E7B34C96F498110@DBAPR08MB5814.eurprd08.prod.outlook.com>
References: <20201029153634.10647-1-dharmik.thakkar@arm.com>
 <20201102235203.6342-1-dharmik.thakkar@arm.com>
 <20201102235203.6342-5-dharmik.thakkar@arm.com>
 <DBAPR08MB5814178EA784F486C344D91898110@DBAPR08MB5814.eurprd08.prod.outlook.com>
 <9B5688D2-D668-4EE4-9ECF-150BDEF5A292@arm.com>
In-Reply-To: <9B5688D2-D668-4EE4-9ECF-150BDEF5A292@arm.com>
Accept-Language: en-US
Content-Language: en-US
X-MS-Has-Attach: 
X-MS-TNEF-Correlator: 
x-ts-tracking-id: 803789D791D3A243971279903AEDDFA7.0
x-checkrecipientchecked: true
Authentication-Results-Original: arm.com; dkim=none (message not signed)
 header.d=none;arm.com; dmarc=none action=none header.from=arm.com;
x-originating-ip: [70.113.13.105]
x-ms-publictraffictype: Email
X-MS-Office365-Filtering-HT: Tenant
X-MS-Office365-Filtering-Correlation-Id: 6a4d4865-101c-4d5d-ea76-08d87fb9e968
x-ms-traffictypediagnostic: DB7PR08MB3611:|DB8PR08MB4025:
x-ms-exchange-transport-forked: True
X-Microsoft-Antispam-PRVS: <DB8PR08MB402585833236DD949A5F6ABD98110@DB8PR08MB4025.eurprd08.prod.outlook.com>
x-checkrecipientrouted: true
nodisclaimer: true
x-ms-oob-tlc-oobclassifiers: OLM:2331;OLM:2331;
X-MS-Exchange-SenderADCheck: 1
X-Microsoft-Antispam-Untrusted: BCL:0;
X-Microsoft-Antispam-Message-Info-Original: 0xD0egrr/2IWPa+V98Ue7S227uDCZ6UkCrUzKr70izFZ5L1XZQaK/v3D3jzRBjrTQM67wedRSyzmJyLUve1bvvnvWoapCrlYaJGYUMBAygiJfNFKbtF4yLQu384u3NgMs0qhpfQK5MFcyIUVDM7u2iWglBcxfZpbTiDMEB3Y4EBwLEmaDr+RRenVcGVAwEtNHBGFDi4ecAPAhNJk+yEbvBYfbjsks7l0GaX06vJLdlGoFEgKXjdOW8NBv/D0wKvXpda8sAMuPRtSN8xUL+txqwPkuXi8oUpjPszsvKnY2g5zqPCr422pGCO/905jGbNGwXcw7V5248MDnjlTXOwZjQ==
X-Forefront-Antispam-Report-Untrusted: CIP:255.255.255.255; CTRY:; LANG:en;
 SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:DBAPR08MB5814.eurprd08.prod.outlook.com;
 PTR:; CAT:NONE;
 SFS:(4636009)(396003)(366004)(39860400002)(346002)(136003)(376002)(6862004)(6636002)(7696005)(83380400001)(52536014)(33656002)(30864003)(9686003)(76116006)(86362001)(186003)(66476007)(478600001)(5660300002)(2906002)(8936002)(54906003)(71200400001)(316002)(66556008)(6506007)(64756008)(66446008)(4326008)(66946007)(55016002)(26005);
 DIR:OUT; SFP:1101; 
x-ms-exchange-antispam-messagedata: 6dItqnHEw47h9zXH34hUQn8Qz06SbT6PNUISTi+6m9Ut6sirvI/fTqkFFt/0P6tY9QpkXq9FRK9DPO4jMt43ZutX+xV8/KoWEmxz3dsAtH8sg89yfjQMEn5o5PJQpsD5tAyKQbWoXmdtMNPBdejjQvikyzuJx0zqClMiWgXsNGp8OGpFqYwZud8slVlyTGjSq95ycarO4NCNJ3UPuGCyzB0BXJMUz70LjlBc4yVtIKPvrAV+7UXxt0c0KW6/PAQGt+02SX5phh95l9tz+/eyeIYcyLZp1tMVk1T7MmPIc1GcyRQPo3mYuB7UBaYd509/B97OJMSlqgKZ1y05leEQVgPv/MOZRqt29sVQCHXsugx8HIQu3IZe8pYi9SmYNnjXZ4YpaG1DQII3ey63eq+u+HkZyepFaeeQOJvRaf40yY4liPpAEQetAv78qYcm5zkJP9BMySpI2otOw7Dis0JJKBesXWt5qybbx6QjAu6dNkdyiIITv1fl4nfus8XgtlYMxUuac59a2grtz9HAkopX9LG8WargWJVOEule9sycy1ZJO4oqvpxNPWmRK4O2cIggAz+Dvh4gqU5jeZMPfpXUlKF2T/OqFH7VBGe8V+QZeEaw4irCRaOAWplr9WRRnXowNTaao7cZzXFOcJ1wA3sJ6w==
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: quoted-printable
MIME-Version: 1.0
X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB7PR08MB3611
Original-Authentication-Results: arm.com; dkim=none (message not signed)
 header.d=none;arm.com; dmarc=none action=none header.from=arm.com;
X-EOPAttributedMessage: 0
X-MS-Exchange-Transport-CrossTenantHeadersStripped: VE1EUR03FT037.eop-EUR03.prod.protection.outlook.com
X-MS-Office365-Filtering-Correlation-Id-Prvs: 8d4e141c-2a69-4ed7-02cd-08d87fb9e46a
X-Microsoft-Antispam: BCL:0;
X-Microsoft-Antispam-Message-Info: vFtVMpusjK71Tqfn2iRvCiUdnlpAVwsdnWDs/jqxFVqZUfg6wUkNdSGJlxKWU1QmCg1ew92j+JFMB3dwa1Ki7cN+7ZZUcz7zzFMQUfSJxf+iTuDlWBFeTj/ijgf+oLpfTsRalLAS8ANEVs6iDZTubX6etPx/0zqefV/ErzfWsfUMJ3fNDKJLfSfMc/f6KnK4OHK4q2qS4r2Y0M7R3otslUobnhyQ7SrQdiVhPaXrKVBHogRkTT6Oyp1/QRBTn4QEhOANz7TmtFtdfFETo9Vj+rhO4azUaiCpQY3vVkJLuHfWonsNbCuPyW9HG0SSbvAHWPl3GwTLsTBdv3Csj+brOA1gs5VHOhGoT4yLdFRzmUwUdjvyPniEG+4Ii2WTcCVdraX2fMr1X05TvfMI+1lr+g==
X-Forefront-Antispam-Report: CIP:63.35.35.123; CTRY:IE; LANG:en; SCL:1; SRV:;
 IPV:CAL; SFV:NSPM; H:64aa7808-outbound-1.mta.getcheckrecipient.com;
 PTR:ec2-63-35-35-123.eu-west-1.compute.amazonaws.com; CAT:NONE;
 SFS:(4636009)(39860400002)(136003)(346002)(376002)(396003)(46966005)(9686003)(6506007)(5660300002)(33656002)(55016002)(26005)(7696005)(82310400003)(30864003)(336012)(6636002)(54906003)(186003)(4326008)(356005)(6862004)(86362001)(70206006)(47076004)(81166007)(82740400003)(36906005)(70586007)(2906002)(478600001)(52536014)(316002)(8936002)(83380400001);
 DIR:OUT; SFP:1101; 
X-OriginatorOrg: arm.com
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Nov 2020 05:32:53.3190 (UTC)
X-MS-Exchange-CrossTenant-Network-Message-Id: 6a4d4865-101c-4d5d-ea76-08d87fb9e968
X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d
X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[63.35.35.123];
 Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com]
X-MS-Exchange-CrossTenant-AuthSource: VE1EUR03FT037.eop-EUR03.prod.protection.outlook.com
X-MS-Exchange-CrossTenant-AuthAs: Anonymous
X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem
X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB8PR08MB4025
Subject: Re: [dpdk-dev] [PATCH v2 4/4] test/lpm: avoid code duplication in
	rcu	qsbr perf
X-BeenThere: dev@dpdk.org
X-Mailman-Version: 2.1.15
Precedence: list
List-Id: DPDK patches and discussions <dev.dpdk.org>
List-Unsubscribe: <https://mails.dpdk.org/options/dev>,
 <mailto:dev-request@dpdk.org?subject=unsubscribe>
List-Archive: <http://mails.dpdk.org/archives/dev/>
List-Post: <mailto:dev@dpdk.org>
List-Help: <mailto:dev-request@dpdk.org?subject=help>
List-Subscribe: <https://mails.dpdk.org/listinfo/dev>,
 <mailto:dev-request@dpdk.org?subject=subscribe>
Errors-To: dev-bounces@dpdk.org
Sender: "dev" <dev-bounces@dpdk.org>

<snip>

> >>
> >> Avoid code duplication by combining single and multi threaded tests
> >>
> >> Signed-off-by: Dharmik Thakkar <dharmik.thakkar@arm.com>
> >> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
> >> ---
> >> app/test/test_lpm_perf.c | 362
> >> ++++++++++-----------------------------
> >> 1 file changed, 91 insertions(+), 271 deletions(-)
> >>
> >> diff --git a/app/test/test_lpm_perf.c b/app/test/test_lpm_perf.c
> >> index
> >> 224c92fa3d65..229c835c23f7 100644
> >> --- a/app/test/test_lpm_perf.c
> >> +++ b/app/test/test_lpm_perf.c
> >> @@ -67,6 +67,12 @@ enum {
> >> IP_CLASS_C
> >> };
> >>
> >> +enum {
> >> +SINGLE_WRITER =3D 1,
> >> +MULTI_WRITER_1,
> >> +MULTI_WRITER_2
> >> +};
> > Do we need this? Can we use the number of cores instead?
> >
>=20
> There are 3 combinations of writes (adds/deletes):
> 1. Write all the entries - in case of a single writer 2. Write half of th=
e entries -
> in case of multiple writers 3. Write remaining half of the entries - in c=
ase of
> multiple writers
>=20
> So, I think this is required.
IMO, this is not scalable. Essentially, we need 2 parameters to divide the =
routes among each writer thread. We need 2 parameters, 1) total number of w=
riters 2) the core ID in the linear space.
Creating a structure with these 2 and passing that to the writer thread wou=
ld be better and scalable.

>=20
> >> +
> >> /* struct route_rule_count defines the total number of rules in
> >> following a/b/c
> >>  * each item in a[]/b[]/c[] is the number of common IP address class
> >> A/B/C, not
> >>  * including the ones for private local network.
> >> @@ -430,11 +436,16 @@ test_lpm_rcu_qsbr_writer(void *arg)  {
> unsigned
> >> int i, j, si, ei; uint64_t begin, total_cycles; -uint8_t core_id =3D
> >> (uint8_t)((uintptr_t)arg);
> >> +uint8_t writer_id =3D (uint8_t)((uintptr_t)arg);
> >> uint32_t next_hop_add =3D 0xAA;
> >>
> >> -/* 2 writer threads are used */
> >> -if (core_id % 2 =3D=3D 0) {
> >> +/* Single writer (writer_id =3D 1) */
> >> +if (writer_id =3D=3D SINGLE_WRITER) {
> >> +si =3D 0;
> >> +ei =3D NUM_LDEPTH_ROUTE_ENTRIES;
> >> +}
> >> +/* 2 Writers (writer_id =3D 2/3)*/
> >> +else if (writer_id =3D=3D MULTI_WRITER_1) {
> >> si =3D 0;
> >> ei =3D NUM_LDEPTH_ROUTE_ENTRIES / 2;
> >> } else {
> >> @@ -447,29 +458,35 @@ test_lpm_rcu_qsbr_writer(void *arg) for (i =3D 0=
;
> >> i < RCU_ITERATIONS; i++) {
> >> /* Add all the entries */
> >> for (j =3D si; j < ei; j++) {
> >> -pthread_mutex_lock(&lpm_mutex);
> >> +if (writer_id !=3D SINGLE_WRITER)
> >> +pthread_mutex_lock(&lpm_mutex);
> >> if (rte_lpm_add(lpm, large_ldepth_route_table[j].ip,
> >> large_ldepth_route_table[j].depth,
> >> next_hop_add) !=3D 0) {
> >> printf("Failed to add iteration %d, route# %d\n", i, j);
> >> -pthread_mutex_unlock(&lpm_mutex);
> >> +if (writer_id !=3D SINGLE_WRITER)
> >> +
> >> pthread_mutex_unlock(&lpm_mutex);
> >> return -1;
> >> }
> >> -pthread_mutex_unlock(&lpm_mutex);
> >> +if (writer_id !=3D SINGLE_WRITER)
> >> +pthread_mutex_unlock(&lpm_mutex);
> >> }
> >>
> >> /* Delete all the entries */
> >> for (j =3D si; j < ei; j++) {
> >> -pthread_mutex_lock(&lpm_mutex);
> >> +if (writer_id !=3D SINGLE_WRITER)
> >> +pthread_mutex_lock(&lpm_mutex);
> >> if (rte_lpm_delete(lpm,
> >> large_ldepth_route_table[j].ip,
> >> large_ldepth_route_table[j].depth) !=3D 0) { printf("Failed to delete
> >> iteration %d, route# %d\n", i, j); -pthread_mutex_unlock(&lpm_mutex);
> >> +if (writer_id !=3D SINGLE_WRITER)
> >> +
> >> pthread_mutex_unlock(&lpm_mutex);
> >> return -1;
> >> }
> >> -pthread_mutex_unlock(&lpm_mutex);
> >> +if (writer_id !=3D SINGLE_WRITER)
> >> +pthread_mutex_unlock(&lpm_mutex);
> >> }
> >> }
> >>
> >> @@ -482,16 +499,17 @@ test_lpm_rcu_qsbr_writer(void *arg)
> >>
> >> /*
> >>  * Functional test:
> >> - * 2 writers, rest are readers
> >> + * 1/2 writers, rest are readers
> >>  */
> >> static int
> >> -test_lpm_rcu_perf_multi_writer(void)
> >> +test_lpm_rcu_perf_multi_writer(uint8_t use_rcu)
> >> {
> >> struct rte_lpm_config config;
> >> size_t sz;
> >> -unsigned int i;
> >> +unsigned int i, j;
> >> uint16_t core_id;
> >> struct rte_lpm_rcu_config rcu_cfg =3D {0};
> >> +int (*reader_f)(void *arg) =3D NULL;
> >>
> >> if (rte_lcore_count() < 3) {
> >> printf("Not enough cores for lpm_rcu_perf_autotest, expecting at
> >> least 3\n"); @@ -504,273 +522,76 @@
> >> test_lpm_rcu_perf_multi_writer(void)
> >> num_cores++;
> >> }
> >>
> >> -printf("\nPerf test: 2 writers, %d readers, RCU integration
> >> enabled\n", -num_cores - 2);
> >> -
> >> -/* Create LPM table */
> >> -config.max_rules =3D NUM_LDEPTH_ROUTE_ENTRIES; -
> config.number_tbl8s =3D
> >> NUM_LDEPTH_ROUTE_ENTRIES; -config.flags =3D 0; -lpm =3D
> >> rte_lpm_create(__func__, SOCKET_ID_ANY, &config);
> >> -TEST_LPM_ASSERT(lpm !=3D NULL);
> >> -
> >> -/* Init RCU variable */
> >> -sz =3D rte_rcu_qsbr_get_memsize(num_cores);
> >> -rv =3D (struct rte_rcu_qsbr *)rte_zmalloc("rcu0", sz,
> >> -RTE_CACHE_LINE_SIZE); -rte_rcu_qsbr_init(rv, num_cores);
> >> -
> >> -rcu_cfg.v =3D rv;
> >> -/* Assign the RCU variable to LPM */ -if (rte_lpm_rcu_qsbr_add(lpm,
> >> &rcu_cfg) !=3D 0) { -printf("RCU variable assignment failed\n"); -goto
> >> error; -}
> >> -
> >> -writer_done =3D 0;
> >> -__atomic_store_n(&gwrite_cycles, 0, __ATOMIC_RELAXED);
> >> -
> >> -__atomic_store_n(&thr_id, 0, __ATOMIC_SEQ_CST);
> >> -
> >> -/* Launch reader threads */
> >> -for (i =3D 2; i < num_cores; i++)
> >> -rte_eal_remote_launch(test_lpm_rcu_qsbr_reader, NULL,
> >> -enabled_core_ids[i]);
> >> -
> >> -/* Launch writer threads */
> >> -for (i =3D 0; i < 2; i++)
> >> -rte_eal_remote_launch(test_lpm_rcu_qsbr_writer,
> >> -(void *)(uintptr_t)i,
> >> -enabled_core_ids[i]);
> >> -
> >> -/* Wait for writer threads */
> >> -for (i =3D 0; i < 2; i++)
> >> -if (rte_eal_wait_lcore(enabled_core_ids[i]) < 0) -goto error;
> >> -
> >> -printf("Total LPM Adds: %d\n", TOTAL_WRITES); -printf("Total LPM
> >> Deletes: %d\n", TOTAL_WRITES); -printf("Average LPM Add/Del:
> >> %"PRIu64" cycles\n", -__atomic_load_n(&gwrite_cycles,
> >> __ATOMIC_RELAXED) -/ TOTAL_WRITES);
> >> -
> >> -writer_done =3D 1;
> >> -/* Wait until all readers have exited */ -for (i =3D 2; i < num_cores=
;
> >> i++) -rte_eal_wait_lcore(enabled_core_ids[i]);
> >> -
> >> -rte_lpm_free(lpm);
> >> -rte_free(rv);
> >> -lpm =3D NULL;
> >> -rv =3D NULL;
> >> -
> >> -/* Test without RCU integration */
> >> -printf("\nPerf test: 2 writers, %d readers, RCU integration
> >> disabled\n", -num_cores - 2);
> >> -
> >> -/* Create LPM table */
> >> -config.max_rules =3D NUM_LDEPTH_ROUTE_ENTRIES; -
> config.number_tbl8s =3D
> >> NUM_LDEPTH_ROUTE_ENTRIES; -config.flags =3D 0; -lpm =3D
> >> rte_lpm_create(__func__, SOCKET_ID_ANY, &config);
> >> -TEST_LPM_ASSERT(lpm !=3D NULL);
> >> -
> >> -writer_done =3D 0;
> >> -__atomic_store_n(&gwrite_cycles, 0, __ATOMIC_RELAXED);
> >> -__atomic_store_n(&thr_id, 0, __ATOMIC_SEQ_CST);
> >> -
> >> -/* Launch reader threads */
> >> -for (i =3D 2; i < num_cores; i++)
> >> -rte_eal_remote_launch(test_lpm_reader, NULL, -enabled_core_ids[i]);
> >> -
> >> -/* Launch writer threads */
> >> -for (i =3D 0; i < 2; i++)
> >> -rte_eal_remote_launch(test_lpm_rcu_qsbr_writer,
> >> -(void *)(uintptr_t)i,
> >> -enabled_core_ids[i]);
> >> -
> >> -/* Wait for writer threads */
> >> -for (i =3D 0; i < 2; i++)
> >> -if (rte_eal_wait_lcore(enabled_core_ids[i]) < 0) -goto error;
> >> -
> >> -printf("Total LPM Adds: %d\n", TOTAL_WRITES); -printf("Total LPM
> >> Deletes: %d\n", TOTAL_WRITES); -printf("Average LPM Add/Del:
> >> %"PRIu64" cycles\n", -__atomic_load_n(&gwrite_cycles,
> >> __ATOMIC_RELAXED) -/ TOTAL_WRITES);
> >> -
> >> -writer_done =3D 1;
> >> -/* Wait until all readers have exited */ -for (i =3D 2; i < num_cores=
;
> >> i++) -rte_eal_wait_lcore(enabled_core_ids[i]);
> >> -
> >> -rte_lpm_free(lpm);
> >> -
> >> -return 0;
> >> -
> >> -error:
> >> -writer_done =3D 1;
> >> -/* Wait until all readers have exited */ -rte_eal_mp_wait_lcore();
> >> -
> >> -rte_lpm_free(lpm);
> >> -rte_free(rv);
> >> -
> >> -return -1;
> >> -}
> >> -
> >> -/*
> >> - * Functional test:
> >> - * Single writer, rest are readers
> >> - */
> >> -static int
> >> -test_lpm_rcu_perf(void)
> >> -{
> >> -struct rte_lpm_config config;
> >> -uint64_t begin, total_cycles;
> >> -size_t sz;
> >> -unsigned int i, j;
> >> -uint16_t core_id;
> >> -uint32_t next_hop_add =3D 0xAA;
> >> -struct rte_lpm_rcu_config rcu_cfg =3D {0};
> >> -
> >> -if (rte_lcore_count() < 2) {
> >> -printf("Not enough cores for lpm_rcu_perf_autotest, expecting at
> >> least 2\n"); -return TEST_SKIPPED; -}
> >> -
> >> -num_cores =3D 0;
> >> -RTE_LCORE_FOREACH_WORKER(core_id) {
> >> -enabled_core_ids[num_cores] =3D core_id; -num_cores++; -}
> >> -
> >> -printf("\nPerf test: 1 writer, %d readers, RCU integration
> >> enabled\n", -num_cores);
> >> -
> >> -/* Create LPM table */
> >> -config.max_rules =3D NUM_LDEPTH_ROUTE_ENTRIES; -
> config.number_tbl8s =3D
> >> NUM_LDEPTH_ROUTE_ENTRIES; -config.flags =3D 0; -lpm =3D
> >> rte_lpm_create(__func__, SOCKET_ID_ANY, &config);
> >> -TEST_LPM_ASSERT(lpm !=3D NULL);
> >> -
> >> -/* Init RCU variable */
> >> -sz =3D rte_rcu_qsbr_get_memsize(num_cores);
> >> -rv =3D (struct rte_rcu_qsbr *)rte_zmalloc("rcu0", sz,
> >> -RTE_CACHE_LINE_SIZE); -rte_rcu_qsbr_init(rv, num_cores);
> >> -
> >> -rcu_cfg.v =3D rv;
> >> -/* Assign the RCU variable to LPM */ -if (rte_lpm_rcu_qsbr_add(lpm,
> >> &rcu_cfg) !=3D 0) { -printf("RCU variable assignment failed\n"); -goto
> >> error; -}
> >> -
> >> -writer_done =3D 0;
> >> -__atomic_store_n(&thr_id, 0, __ATOMIC_SEQ_CST);
> >> -
> >> -/* Launch reader threads */
> >> -for (i =3D 0; i < num_cores; i++)
> >> -rte_eal_remote_launch(test_lpm_rcu_qsbr_reader, NULL,
> >> -enabled_core_ids[i]);
> >> -
> >> -/* Measure add/delete. */
> >> -begin =3D rte_rdtsc_precise();
> >> -for (i =3D 0; i < RCU_ITERATIONS; i++) {
> >> -/* Add all the entries */
> >> -for (j =3D 0; j < NUM_LDEPTH_ROUTE_ENTRIES; j++) -if (rte_lpm_add(lpm=
,
> >> large_ldepth_route_table[j].ip, -large_ldepth_route_table[j].depth,
> >> -next_hop_add) !=3D 0) {
> >> -printf("Failed to add iteration %d, route# %d\n", -i, j);
> >> +for (j =3D 1; j < 3; j++) {
> >> +if (use_rcu)
> >> +printf("\nPerf test: %d writer(s), %d reader(s),"
> >> +       " RCU integration enabled\n", j, num_cores - j); else
> >> +printf("\nPerf test: %d writer(s), %d reader(s),"
> >> +       " RCU integration disabled\n", j, num_cores - j);
> >> +
> >> +/* Create LPM table */
> >> +config.max_rules =3D NUM_LDEPTH_ROUTE_ENTRIES;
> config.number_tbl8s =3D
> >> +NUM_LDEPTH_ROUTE_ENTRIES; config.flags =3D 0; lpm =3D
> >> +rte_lpm_create(__func__, SOCKET_ID_ANY, &config);
> >> +TEST_LPM_ASSERT(lpm !=3D NULL);
> >> +
> >> +/* Init RCU variable */
> >> +if (use_rcu) {
> >> +sz =3D rte_rcu_qsbr_get_memsize(num_cores);
> >> +rv =3D (struct rte_rcu_qsbr *)rte_zmalloc("rcu0", sz,
> >> +
> >> RTE_CACHE_LINE_SIZE);
> >> +rte_rcu_qsbr_init(rv, num_cores);
> >> +
> >> +rcu_cfg.v =3D rv;
> >> +/* Assign the RCU variable to LPM */ if (rte_lpm_rcu_qsbr_add(lpm,
> >> +&rcu_cfg) !=3D 0) { printf("RCU variable assignment failed\n");
> >> goto error;
> >> }
> >>
> >> -/* Delete all the entries */
> >> -for (j =3D 0; j < NUM_LDEPTH_ROUTE_ENTRIES; j++) -if
> >> (rte_lpm_delete(lpm, large_ldepth_route_table[j].ip,
> >> -large_ldepth_route_table[j].depth) !=3D 0) { -printf("Failed to delet=
e
> >> iteration %d, route# %d\n", -i, j); -goto error; -} -} -total_cycles
> >> =3D rte_rdtsc_precise() - begin;
> >> +reader_f =3D test_lpm_rcu_qsbr_reader; } else reader_f =3D
> >> +test_lpm_reader;
> >>
> >> -printf("Total LPM Adds: %d\n", TOTAL_WRITES); -printf("Total LPM
> >> Deletes: %d\n", TOTAL_WRITES); -printf("Average LPM Add/Del: %g
> >> cycles\n", -(double)total_cycles / TOTAL_WRITES);
> >> +writer_done =3D 0;
> >> +__atomic_store_n(&gwrite_cycles, 0, __ATOMIC_RELAXED);
> >>
> >> -writer_done =3D 1;
> >> -/* Wait until all readers have exited */ -for (i =3D 0; i < num_cores=
;
> >> i++) -if (rte_eal_wait_lcore(enabled_core_ids[i]);
> >> -
> >> -rte_lpm_free(lpm);
> >> -rte_free(rv);
> >> -lpm =3D NULL;
> >> -rv =3D NULL;
> >> -
> >> -/* Test without RCU integration */
> >> -printf("\nPerf test: 1 writer, %d readers, RCU integration
> >> disabled\n", -num_cores);
> >> -
> >> -/* Create LPM table */
> >> -config.max_rules =3D NUM_LDEPTH_ROUTE_ENTRIES; -
> config.number_tbl8s =3D
> >> NUM_LDEPTH_ROUTE_ENTRIES; -config.flags =3D 0; -lpm =3D
> >> rte_lpm_create(__func__, SOCKET_ID_ANY, &config);
> >> -TEST_LPM_ASSERT(lpm !=3D NULL);
> >> +__atomic_store_n(&thr_id, 0, __ATOMIC_SEQ_CST);
> >>
> >> -writer_done =3D 0;
> >> -__atomic_store_n(&thr_id, 0, __ATOMIC_SEQ_CST);
> >> +/* Launch reader threads */
> >> +for (i =3D j; i < num_cores; i++)
> >> +rte_eal_remote_launch(reader_f, NULL,
> >> +enabled_core_ids[i]);
> >>
> >> -/* Launch reader threads */
> >> -for (i =3D 0; i < num_cores; i++)
> >> -rte_eal_remote_launch(test_lpm_reader, NULL,
> >> -enabled_core_ids[i]);
> >> +/* Launch writer threads */
> >> +for (i =3D 0; i < j; i++)
> >> +rte_eal_remote_launch(test_lpm_rcu_qsbr_writer,
> >> +(void *)(uintptr_t)(i + j),
> > This can be just 'j'?
> >
> >> +enabled_core_ids[i]);
> >>
> >> -/* Measure add/delete. */
> >> -begin =3D rte_rdtsc_precise();
> >> -for (i =3D 0; i < RCU_ITERATIONS; i++) {
> >> -/* Add all the entries */
> >> -for (j =3D 0; j < NUM_LDEPTH_ROUTE_ENTRIES; j++)
> >> -if (rte_lpm_add(lpm, large_ldepth_route_table[j].ip,
> >> -large_ldepth_route_table[j].depth,
> >> -next_hop_add) !=3D 0) {
> >> -printf("Failed to add iteration %d, route#
> >> %d\n",
> >> -i, j);
> >> +/* Wait for writer threads */
> >> +for (i =3D 0; i < j; i++)
> >> +if (rte_eal_wait_lcore(enabled_core_ids[i]) < 0)
> >> goto error;
> >> -}
> >>
> >> -/* Delete all the entries */
> >> -for (j =3D 0; j < NUM_LDEPTH_ROUTE_ENTRIES; j++)
> >> -if (rte_lpm_delete(lpm,
> >> large_ldepth_route_table[j].ip,
> >> -large_ldepth_route_table[j].depth) !=3D 0) {
> >> -printf("Failed to delete iteration %d, route#
> >> %d\n",
> >> -i, j);
> >> -goto error;
> >> -}
> >> +printf("Total LPM Adds: %d\n", TOTAL_WRITES);
> >> +printf("Total LPM Deletes: %d\n", TOTAL_WRITES);
> >> +printf("Average LPM Add/Del: %"PRIu64" cycles\n",
> >> +__atomic_load_n(&gwrite_cycles,
> >> __ATOMIC_RELAXED)
> >> +/ TOTAL_WRITES);
> >> +
> >> +writer_done =3D 1;
> >> +/* Wait until all readers have exited */
> >> +for (i =3D j; i < num_cores; i++)
> >> +rte_eal_wait_lcore(enabled_core_ids[i]);
> >> +
> >> +rte_lpm_free(lpm);
> >> +rte_free(rv);
> >> +lpm =3D NULL;
> >> +rv =3D NULL;
> >> }
> >> -total_cycles =3D rte_rdtsc_precise() - begin;
> >> -
> >> -printf("Total LPM Adds: %d\n", TOTAL_WRITES);
> >> -printf("Total LPM Deletes: %d\n", TOTAL_WRITES);
> >> -printf("Average LPM Add/Del: %g cycles\n",
> >> -(double)total_cycles / TOTAL_WRITES);
> >> -
> >> -writer_done =3D 1;
> >> -/* Wait until all readers have exited */
> >> -for (i =3D 0; i < num_cores; i++)
> >> -rte_eal_wait_lcore(enabled_core_ids[i]);
> >> -
> >> -rte_lpm_free(lpm);
> >>
> >> return 0;
> >>
> >> @@ -946,9 +767,8 @@ test_lpm_perf(void)
> >> rte_lpm_delete_all(lpm);
> >> rte_lpm_free(lpm);
> >>
> >> -test_lpm_rcu_perf();
> >> -
> >> -test_lpm_rcu_perf_multi_writer();
> >> +test_lpm_rcu_perf_multi_writer(0);
> >> +test_lpm_rcu_perf_multi_writer(1);
> >>
> >> return 0;
> >> }
> >> --
> >> 2.17.1
>=20