From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id B1316ADBE for ; Tue, 27 May 2014 05:00:56 +0200 (CEST) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP; 26 May 2014 20:01:06 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.98,916,1392192000"; d="scan'208,217";a="545275865" Received: from fmsmsx108.amr.corp.intel.com ([10.19.9.228]) by fmsmga002.fm.intel.com with ESMTP; 26 May 2014 20:01:05 -0700 Received: from fmsmsx102.amr.corp.intel.com (10.19.9.53) by FMSMSX108.amr.corp.intel.com (10.19.9.228) with Microsoft SMTP Server (TLS) id 14.3.123.3; Mon, 26 May 2014 20:01:05 -0700 Received: from shsmsx103.ccr.corp.intel.com (10.239.4.69) by FMSMSX102.amr.corp.intel.com (10.19.9.53) with Microsoft SMTP Server (TLS) id 14.3.123.3; Mon, 26 May 2014 20:01:04 -0700 Received: from shsmsx101.ccr.corp.intel.com ([169.254.1.7]) by SHSMSX103.ccr.corp.intel.com ([169.254.4.34]) with mapi id 14.03.0123.003; Tue, 27 May 2014 11:01:03 +0800 From: "Xu, HuilongX" To: "dev@dpdk.org" , "Burakov, Anatoly" Thread-Topic: [dpdk-dev] [PATCH v2 05/16] Moved interrupt type out of igb_uio Thread-Index: Ac95VennWbPJ07grQeueRCtADTHA5QAAdxpA Date: Tue, 27 May 2014 03:01:02 +0000 Message-ID: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-cr-hashedpuzzle: fGI= Ahgh AjSW Biod B9xX Cow+ EgwL EpvA E1i0 FS4b FxrF F5o1 Kby9 Klb7 LVJ5 Lb7j; 1; ZABlAHYAQABkAHAAZABrAC4AbwByAGcA; Sosha1_v1; 7; {B888A468-A4B1-4134-A487-6EDF5A46A36F}; aAB1AGkAbABvAG4AZwB4AC4AeAB1AEAAaQBuAHQAZQBsAC4AYwBvAG0A; Tue, 27 May 2014 03:01:00 GMT; UgBFADoAIABbAGQAcABkAGsALQBkAGUAdgBdACAAWwBQAEEAVABDAEgAIAB2ADIAIAAwADUALwAxADYAXQAgAE0AbwB2AGUAZAAgAGkAbgB0AGUAcgByAHUAcAB0ACAAdAB5AHAAZQAgAG8AdQB0ACAAbwBmACAAaQBnAGIAXwB1AGkAbwA= x-cr-puzzleid: {B888A468-A4B1-4134-A487-6EDF5A46A36F} x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable X-Content-Filtered-By: Mailman/MimeDel 2.1.15 Subject: Re: [dpdk-dev] [PATCH v2 05/16] Moved interrupt type out of igb_uio X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 27 May 2014 03:00:58 -0000 Moving interrupt type enum out of igb_uio and renaming it to be more generic. Such a strange header naming and separation is done mostly to make coming virtio patches easier to port to dpdk.org tree. Signed-off-by: Anatoly Burakov Test-by: HuilongX Xu Compile pass >>Compile OS: FC20 x86_64 >>Kernel version: 3.13.6-200 >>GCC version: 4.8.2 >>Server: Crownpass --- lib/librte_eal/common/Makefile | 1 + lib/librte_eal/common/include/rte_pci.h | 1 + .../common/include/rte_pci_dev_feature_defs.h | 46 +++++++++++++++++= + .../common/include/rte_pci_dev_features.h | 40 ++++++++++++++++ lib/librte_eal/linuxapp/igb_uio/igb_uio.c | 49 ++++++++---------= -- 5 files changed, 109 insertions(+), 28 deletions(-) create mode 100644 lib/librte_eal/common/include/rte_pci_dev_feature_defs.h create mode 100644 lib/librte_eal/common/include/rte_pci_dev_features.h diff --git a/lib/librte_eal/common/Makefile b/lib/librte_eal/common/Makefil= e index 2f99bf4..7daf38c 100644 --- a/lib/librte_eal/common/Makefile +++ b/lib/librte_eal/common/Makefile @@ -39,6 +39,7 @@ INC +=3D rte_rwlock.h rte_spinlock.h rte_tailq.h rte_inte= rrupts.h rte_alarm.h INC +=3D rte_string_fns.h rte_cpuflags.h rte_version.h rte_tailq_elem.h INC +=3D rte_eal_memconfig.h rte_malloc_heap.h INC +=3D rte_hexdump.h rte_devargs.h rte_vdev.h +INC +=3D rte_pci_dev_feature_defs.h rte_pci_dev_features.h ifeq ($(CONFIG_RTE_INSECURE_FUNCTION_WARNING),y) INC +=3D rte_warnings.h diff --git a/lib/librte_eal/common/include/rte_pci.h b/lib/librte_eal/commo= n/include/rte_pci.h index 84d7b42..d364cee 100644 --- a/lib/librte_eal/common/include/rte_pci.h +++ b/lib/librte_eal/common/include/rte_pci.h @@ -80,6 +80,7 @@ extern "C" { #include #include #include + #include TAILQ_HEAD(pci_device_list, rte_pci_device); /**< PCI devices in D-linked = Q. */ diff --git a/lib/librte_eal/common/include/rte_pci_dev_feature_defs.h b/lib= /librte_eal/common/include/rte_pci_dev_feature_defs.h new file mode 100644 index 0000000..82f2c00 --- /dev/null +++ b/lib/librte_eal/common/include/rte_pci_dev_feature_defs.h @@ -0,0 +1,46 @@ +/*- + * BSD LICENSE + * + * Copyright(c) 2010-2014 Intel Corporation. All rights reserved. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RTE_PCI_DEV_DEFS_H_ +#define _RTE_PCI_DEV_DEFS_H_ + +/* interrupt mode */ +enum rte_intr_mode { + RTE_INTR_MODE_NONE =3D 0, + RTE_INTR_MODE_LEGACY, + RTE_INTR_MODE_MSI, + RTE_INTR_MODE_MSIX, + RTE_INTR_MODE_MAX +}; + +#endif /* _RTE_PCI_DEV_DEFS_H_ */ diff --git a/lib/librte_eal/common/include/rte_pci_dev_features.h b/lib/lib= rte_eal/common/include/rte_pci_dev_features.h new file mode 100644 index 0000000..61f271a --- /dev/null +++ b/lib/librte_eal/common/include/rte_pci_dev_features.h @@ -0,0 +1,40 @@ +/*- + * BSD LICENSE + * + * Copyright(c) 2010-2014 Intel Corporation. All rights reserved. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include + +#define RTE_INTR_MODE_NONE_NAME "none" +#define RTE_INTR_MODE_LEGACY_NAME "legacy" +#define RTE_INTR_MODE_MSI_NAME "msi" +#define RTE_INTR_MODE_MSIX_NAME "msix" +#define RTE_INTR_MODE_MAX_MAX "max" diff --git a/lib/librte_eal/linuxapp/igb_uio/igb_uio.c b/lib/librte_eal/lin= uxapp/igb_uio/igb_uio.c index 09c40bf..043c0f6 100644 --- a/lib/librte_eal/linuxapp/igb_uio/igb_uio.c +++ b/lib/librte_eal/linuxapp/igb_uio/igb_uio.c @@ -33,6 +33,7 @@ #ifdef CONFIG_XEN_DOM0 #include #endif +#include /** * MSI-X related macros, copy from linux/pci_regs.h in kernel 2.6.39, @@ -49,14 +50,6 @@ #define IGBUIO_NUM_MSI_VECTORS 1 -/* interrupt mode */ -enum igbuio_intr_mode { - IGBUIO_LEGACY_INTR_MODE =3D 0, - IGBUIO_MSI_INTR_MODE, - IGBUIO_MSIX_INTR_MODE, - IGBUIO_INTR_MODE_MAX -}; - /** * A structure describing the private information for a uio device. */ @@ -64,13 +57,13 @@ struct rte_uio_pci_dev { struct uio_info info; struct pci_dev *pdev; spinlock_t lock; /* spinlock for accessing PCI config space = or msix data in multi tasks/isr */ - enum igbuio_intr_mode mode; + enum rte_intr_mode mode; struct msix_entry \ msix_entries[IGBUIO_NUM_MSI_VECTORS]; /* poi= nter to the msix vectors to be allocated later */ }; static char *intr_mode =3D NULL; -static enum igbuio_intr_mode igbuio_intr_mode_preferred =3D IGBUIO_MSIX_IN= TR_MODE; +static enum rte_intr_mode igbuio_intr_mode_preferred =3D RTE_INTR_MODE_MSI= X; /* PCI device id table */ static struct pci_device_id igbuio_pci_ids[] =3D { @@ -222,14 +215,14 @@ igbuio_set_interrupt_mask(struct rte_uio_pci_dev *ude= v, int32_t state) { struct pci_dev *pdev =3D udev->pdev; - if (udev->mode =3D=3D IGBUIO_MSIX_INTR_MODE) { + if (udev->mode =3D=3D RTE_INTR_MODE_MSIX) { struct msi_desc *desc; list_for_each_entry(desc, &pdev->msi_list, = list) { igbuio_msix_mask_irq(desc, s= tate); } } - else if (udev->mode =3D=3D IGBUIO_LEGACY_INTR_MODE) { + else if (udev->mode =3D=3D RTE_INTR_MODE_LEGACY) { uint32_t status; uint16_t old, new; @@ -301,7 +294,7 @@ igbuio_pci_irqhandler(int irq, struct uio_info *info) goto spin_unlock; /* for legacy mode, interrupt maybe shared */ - if (udev->mode =3D=3D IGBUIO_LEGACY_INTR_MODE) { + if (udev->mode =3D=3D RTE_INTR_MODE_LEGACY) { pci_read_config_dword(pdev, PCI_COMMAND, &cm= d_status_dword); status =3D cmd_status_dword >> 16; /* interrupt is not ours, goes to out */ @@ -520,18 +513,18 @@ igbuio_pci_probe(struct pci_dev *dev, const struct pc= i_device_id *id) #endif udev->info.priv =3D udev; udev->pdev =3D dev; - udev->mode =3D 0; /* set the default value for interrupt mod= e */ + udev->mode =3D RTE_INTR_MODE_LEGACY; spin_lock_init(&udev->lock); /* check if it need to try msix first */ - if (igbuio_intr_mode_preferred =3D=3D IGBUIO_MSIX_INTR_MODE)= { + if (igbuio_intr_mode_preferred =3D=3D RTE_INTR_MODE_MSIX) { int vector; for (vector =3D 0; vector < IGBUIO_NUM_MSI_= VECTORS; vector ++) udev->msix_entries[vector].e= ntry =3D vector; if (pci_enable_msix(udev->pdev, udev->msix_= entries, IGBUIO_NUM_MSI_VECTORS) =3D=3D 0) { - udev->mode =3D IGBUIO_MSIX_I= NTR_MODE; + udev->mode =3D RTE_INTR_MODE_= MSIX; } else { pci_disable_msix(udev->pdev)= ; @@ -539,13 +532,13 @@ igbuio_pci_probe(struct pci_dev *dev, const struct pc= i_device_id *id) } } switch (udev->mode) { - case IGBUIO_MSIX_INTR_MODE: + case RTE_INTR_MODE_MSIX: udev->info.irq_flags =3D 0; udev->info.irq =3D udev->msix_entries[0].vec= tor; break; - case IGBUIO_MSI_INTR_MODE: + case RTE_INTR_MODE_MSI: break; - case IGBUIO_LEGACY_INTR_MODE: + case RTE_INTR_MODE_LEGACY: udev->info.irq_flags =3D IRQF_SHARED; udev->info.irq =3D dev->irq; break; @@ -570,7 +563,7 @@ igbuio_pci_probe(struct pci_dev *dev, const struct pci_= device_id *id) fail_release_iomem: sysfs_remove_group(&dev->dev.kobj, &dev_attr_grp); igbuio_pci_release_iomem(&udev->info); - if (udev->mode =3D=3D IGBUIO_MSIX_INTR_MODE) + if (udev->mode =3D=3D RTE_INTR_MODE_MSIX) pci_disable_msix(udev->pdev); pci_release_regions(dev); fail_disable: @@ -595,8 +588,8 @@ igbuio_pci_remove(struct pci_dev *dev) uio_unregister_device(info); igbuio_pci_release_iomem(info); if (((struct rte_uio_pci_dev *)info->priv)->mode =3D=3D - = IGBUIO_MSIX_INTR_MODE) - pci_disable_msix(dev); + RTE_INTR_MODE_MSIX) + pci_disable_msix(dev); pci_release_regions(dev); pci_disable_device(dev); pci_set_drvdata(dev, NULL); @@ -611,11 +604,11 @@ igbuio_config_intr_mode(char *intr_str) return 0; } - if (!strcmp(intr_str, "msix")) { - igbuio_intr_mode_preferred =3D IGBUIO_MSIX_I= NTR_MODE; + if (!strcmp(intr_str, RTE_INTR_MODE_MSIX_NAME)) { + igbuio_intr_mode_preferred =3D RTE_INTR_MODE_= MSIX; printk(KERN_INFO "Use MSIX interrupt\n"); - } else if (!strcmp(intr_str, "legacy")) { - igbuio_intr_mode_preferred =3D IGBUIO_LEGACY= _INTR_MODE; + } else if (!strcmp(intr_str, RTE_INTR_MODE_LEGACY_NAME)) { + igbuio_intr_mode_preferred =3D RTE_INTR_MODE_= LEGACY; printk(KERN_INFO "Use legacy interrupt\n"); } else { printk(KERN_INFO "Error: bad parameter - %s\= n", intr_str); @@ -656,8 +649,8 @@ module_exit(igbuio_pci_exit_module); module_param(intr_mode, charp, S_IRUGO | S_IWUSR); MODULE_PARM_DESC(intr_mode, "igb_uio interrupt mode (default=3Dmsix):\n" -" msix Use MSIX interrupt\n" -" legacy Use Legacy interrupt\n" +" " RTE_INTR_MODE_MSIX_NAME " Use MSIX interrupt\n" +" " RTE_INTR_MODE_LEGACY_NAME " Use Legacy interrupt\n" "\n"); MODULE_DESCRIPTION("UIO driver for Intel IGB PCI cards"); -- 1.7.0.7