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From: "Loftus, Ciara" <ciara.loftus@intel.com>
To: "Richardson, Bruce" <bruce.richardson@intel.com>,
	"dev@dpdk.org" <dev@dpdk.org>
Cc: "Richardson, Bruce" <bruce.richardson@intel.com>,
	"stable@dpdk.org" <stable@dpdk.org>
Subject: RE: [PATCH] net/ice: fix path selection for QinQ Tx offload
Date: Wed, 12 Nov 2025 13:46:58 +0000	[thread overview]
Message-ID: <DM3PPF7D18F34A14733C367584A08902B1C8ECCA@DM3PPF7D18F34A1.namprd11.prod.outlook.com> (raw)
In-Reply-To: <20251112115726.1286735-1-bruce.richardson@intel.com>

> Subject: [PATCH] net/ice: fix path selection for QinQ Tx offload
> 
> The capabilities flag for the vector offload path include the QinQ
> offload capability, but in fact the offload path lacks any ability to
> create context descriptors. This means that it cannot insert multiple
> vlan tags for QinQ support, so move the offload from the VECTOR_OFFLOAD
> list to the NO_VECTOR list. Similarly, remove any check for the QinQ
> mbuf flag in any packets being transmitted, since that offload is
> invalid to request if the feature is not enabled.
> 
> Fixes: 808a17b3c1e6 ("net/ice: add Rx AVX512 offload path")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>

Acked-by: Ciara Loftus <ciara.loftus@intel.com>

> ---
>  drivers/net/intel/ice/ice_rxtx_vec_common.h | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/net/intel/ice/ice_rxtx_vec_common.h
> b/drivers/net/intel/ice/ice_rxtx_vec_common.h
> index a7cc4736cf..62047e9f2f 100644
> --- a/drivers/net/intel/ice/ice_rxtx_vec_common.h
> +++ b/drivers/net/intel/ice/ice_rxtx_vec_common.h
> @@ -53,6 +53,7 @@ _ice_rx_queue_release_mbufs_vec(struct ci_rx_queue
> *rxq)
> 
>  #define ICE_TX_NO_VECTOR_FLAGS (			\
>  		RTE_ETH_TX_OFFLOAD_MULTI_SEGS |		\
> +		RTE_ETH_TX_OFFLOAD_QINQ_INSERT |	\
>  		RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM |	\
>  		RTE_ETH_TX_OFFLOAD_TCP_TSO |	\
>  		RTE_ETH_TX_OFFLOAD_VXLAN_TNL_TSO |    \
> @@ -63,7 +64,6 @@ _ice_rx_queue_release_mbufs_vec(struct ci_rx_queue
> *rxq)
> 
>  #define ICE_TX_VECTOR_OFFLOAD (				\
>  		RTE_ETH_TX_OFFLOAD_VLAN_INSERT |		\
> -		RTE_ETH_TX_OFFLOAD_QINQ_INSERT |		\
>  		RTE_ETH_TX_OFFLOAD_IPV4_CKSUM |		\
>  		RTE_ETH_TX_OFFLOAD_SCTP_CKSUM |		\
>  		RTE_ETH_TX_OFFLOAD_UDP_CKSUM |		\
> @@ -194,8 +194,8 @@ ice_txd_enable_offload(struct rte_mbuf *tx_pkt,
> 
>  	*txd_hi |= ((uint64_t)td_offset) << ICE_TXD_QW1_OFFSET_S;
> 
> -	/* Tx VLAN/QINQ insertion Offload */
> -	if (ol_flags & (RTE_MBUF_F_TX_VLAN | RTE_MBUF_F_TX_QINQ)) {
> +	/* Tx VLAN insertion Offload */
> +	if (ol_flags & RTE_MBUF_F_TX_VLAN) {
>  		td_cmd |= ICE_TX_DESC_CMD_IL2TAG1;
>  		*txd_hi |= ((uint64_t)tx_pkt->vlan_tci <<
>  				ICE_TXD_QW1_L2TAG1_S);
> --
> 2.48.1


  reply	other threads:[~2025-11-12 13:47 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-12 11:57 Bruce Richardson
2025-11-12 13:46 ` Loftus, Ciara [this message]
2025-11-12 16:25   ` Bruce Richardson

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