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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM3PPF7D18F34A1.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 368a48de-91c5-438a-f95a-08ddd4109d32 X-MS-Exchange-CrossTenant-originalarrivaltime: 05 Aug 2025 11:09:57.5282 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: cyZJCbXKHTg9/1h8N8AXRikCtI3N29NxHZHTBCNmaBR7eNVae9+FXaj+S/oOiZKQSBf27K35A2zJPSbV238pjA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR11MB7439 X-OriginatorOrg: intel.com X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org >=20 > On Thu, Jun 19, 2025 at 01:36:56PM +0000, Ciara Loftus wrote: > > Enable Tx QINQ offload if the VF reports support for inserting both an > > outer and inner VLAN tag. The VF capabilities report the locations for > > placing each of the tags - either L2TAG1 in the tx descriptor or L2TAG2 > > in the context descriptor. Use this information to configure the > > descriptors correctly. > > This offload was previously incorrectly reported as always supported in > > the device configuration, so this is corrected. > > > > Signed-off-by: Ciara Loftus > > --- > > doc/guides/nics/features/iavf.ini | 1 + > > drivers/net/intel/iavf/iavf_ethdev.c | 8 +++- > > drivers/net/intel/iavf/iavf_rxtx.c | 55 +++++++++++++++++++++------- > > 3 files changed, 48 insertions(+), 16 deletions(-) > > > > diff --git a/doc/guides/nics/features/iavf.ini > b/doc/guides/nics/features/iavf.ini > > index ce9860e963..61c4742197 100644 > > --- a/doc/guides/nics/features/iavf.ini > > +++ b/doc/guides/nics/features/iavf.ini > > @@ -29,6 +29,7 @@ Traffic manager =3D Y > > Inline crypto =3D Y > > CRC offload =3D Y > > VLAN offload =3D P > > +QinQ offload =3D P > > L3 checksum offload =3D Y > > L4 checksum offload =3D Y > > Timestamp offload =3D Y > > diff --git a/drivers/net/intel/iavf/iavf_ethdev.c > b/drivers/net/intel/iavf/iavf_ethdev.c > > index b3dacbef84..d058b87d54 100644 > > --- a/drivers/net/intel/iavf/iavf_ethdev.c > > +++ b/drivers/net/intel/iavf/iavf_ethdev.c > > @@ -622,7 +622,7 @@ iavf_dev_vlan_insert_set(struct rte_eth_dev *dev) > > return 0; > > > > enable =3D !!(dev->data->dev_conf.txmode.offloads & > > - RTE_ETH_TX_OFFLOAD_VLAN_INSERT); > > + (RTE_ETH_TX_OFFLOAD_VLAN_INSERT | > RTE_ETH_TX_OFFLOAD_QINQ_INSERT)); > > iavf_config_vlan_insert_v2(adapter, enable); > > > > return 0; > > @@ -1158,7 +1158,6 @@ iavf_dev_info_get(struct rte_eth_dev *dev, struct > rte_eth_dev_info *dev_info) > > > > dev_info->tx_offload_capa =3D > > RTE_ETH_TX_OFFLOAD_VLAN_INSERT | > > - RTE_ETH_TX_OFFLOAD_QINQ_INSERT | > > RTE_ETH_TX_OFFLOAD_IPV4_CKSUM | > > RTE_ETH_TX_OFFLOAD_UDP_CKSUM | > > RTE_ETH_TX_OFFLOAD_TCP_CKSUM | > > @@ -1182,6 +1181,11 @@ iavf_dev_info_get(struct rte_eth_dev *dev, > struct rte_eth_dev_info *dev_info) > > if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_CAP_PTP) > > dev_info->rx_offload_capa |=3D > RTE_ETH_RX_OFFLOAD_TIMESTAMP; > > > > + if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN_V2 && > > + vf->vlan_v2_caps.offloads.insertion_support.inner > && > > + vf->vlan_v2_caps.offloads.insertion_support.outer) > > + dev_info->tx_offload_capa |=3D > RTE_ETH_TX_OFFLOAD_QINQ_INSERT; > > + > > if (iavf_ipsec_crypto_supported(adapter)) { > > dev_info->rx_offload_capa |=3D > RTE_ETH_RX_OFFLOAD_SECURITY; > > dev_info->tx_offload_capa |=3D > RTE_ETH_TX_OFFLOAD_SECURITY; > > diff --git a/drivers/net/intel/iavf/iavf_rxtx.c > b/drivers/net/intel/iavf/iavf_rxtx.c > > index 5411eb6897..1ce9de0699 100644 > > --- a/drivers/net/intel/iavf/iavf_rxtx.c > > +++ b/drivers/net/intel/iavf/iavf_rxtx.c > > @@ -797,17 +797,32 @@ iavf_dev_tx_queue_setup(struct rte_eth_dev > *dev, > > &adapter- > >vf.vlan_v2_caps.offloads.insertion_support; > > uint32_t insertion_cap; > > > > - if (insertion_support->outer) > > - insertion_cap =3D insertion_support->outer; > > - else > > - insertion_cap =3D insertion_support->inner; > > - > > - if (insertion_cap & VIRTCHNL_VLAN_TAG_LOCATION_L2TAG1) > { > > - txq->vlan_flag =3D > IAVF_TX_FLAGS_VLAN_TAG_LOC_L2TAG1; > > - PMD_INIT_LOG(DEBUG, "VLAN insertion_cap: > L2TAG1"); > > - } else if (insertion_cap & > VIRTCHNL_VLAN_TAG_LOCATION_L2TAG2) { > > - txq->vlan_flag =3D > IAVF_TX_FLAGS_VLAN_TAG_LOC_L2TAG2; > > - PMD_INIT_LOG(DEBUG, "VLAN insertion_cap: > L2TAG2"); > > + if (insertion_support->outer =3D=3D > VIRTCHNL_VLAN_UNSUPPORTED || > > + insertion_support->inner =3D=3D > VIRTCHNL_VLAN_UNSUPPORTED) { > > + /* Only one insertion is supported. */ > > + if (insertion_support->outer) > > + insertion_cap =3D insertion_support->outer; > > + else > > + insertion_cap =3D insertion_support->inner; > > + > > + if (insertion_cap & > VIRTCHNL_VLAN_TAG_LOCATION_L2TAG1) { > > + txq->vlan_flag =3D > IAVF_TX_FLAGS_VLAN_TAG_LOC_L2TAG1; > > + PMD_INIT_LOG(DEBUG, "VLAN insertion_cap: > L2TAG1"); > > + } else if (insertion_cap & > VIRTCHNL_VLAN_TAG_LOCATION_L2TAG2) { > > + txq->vlan_flag =3D > IAVF_TX_FLAGS_VLAN_TAG_LOC_L2TAG2; > > + PMD_INIT_LOG(DEBUG, "VLAN insertion_cap: > L2TAG2"); >=20 > Is this scenario possible - we only support insertion of a single vlan ta= g, > and it's to go in the context descriptor. In this case, do we not need to > add in the VLAN offload flag to the list of offloads needing a context > descriptor below? This scenario is possible. It's the case I hit when I test with a VF from m= y Fortville card. This code block is the same as what's in the existing code, it's wrapped ar= ound a new if condition checking if only one insertion capability is suppor= ted (inner or outer). The new code is in the else {}. No update is needed to iavf_calc_context_desc because what you are describi= ng is already in place. >=20 > > + } > > + } else { > > + /* Both outer and inner insertion supported. */ > > + if (insertion_support->inner & > VIRTCHNL_VLAN_TAG_LOCATION_L2TAG1) { > > + txq->vlan_flag =3D > IAVF_TX_FLAGS_VLAN_TAG_LOC_L2TAG1; > > + PMD_INIT_LOG(DEBUG, "Inner VLAN > insertion_cap: L2TAG1"); > > + PMD_INIT_LOG(DEBUG, "Outer VLAN > insertion_cap: L2TAG2"); > > + } else { > > + txq->vlan_flag =3D > IAVF_TX_FLAGS_VLAN_TAG_LOC_L2TAG2; > > + PMD_INIT_LOG(DEBUG, "Inner VLAN > insertion_cap: L2TAG2"); > > + PMD_INIT_LOG(DEBUG, "Outer VLAN > insertion_cap: L2TAG1"); > > + } > > } > > } else { > > txq->vlan_flag =3D IAVF_TX_FLAGS_VLAN_TAG_LOC_L2TAG1; > > @@ -2391,7 +2406,7 @@ iavf_calc_context_desc(struct rte_mbuf *mb, > uint8_t vlan_flag) > > uint64_t flags =3D mb->ol_flags; > > if (flags & (RTE_MBUF_F_TX_TCP_SEG | RTE_MBUF_F_TX_UDP_SEG | > > RTE_MBUF_F_TX_TUNNEL_MASK | > RTE_MBUF_F_TX_OUTER_IP_CKSUM | > > - RTE_MBUF_F_TX_OUTER_UDP_CKSUM)) > > + RTE_MBUF_F_TX_OUTER_UDP_CKSUM | RTE_MBUF_F_TX_QINQ)) > > return 1; >=20 > In this check, do we need to take into account possible case for only a > single vlan offload, and requiring an L2TAG2 field for it? This already exists. Here's what's already there: if (flags & RTE_MBUF_F_TX_VLAN && vlan_flag & IAVF_TX_FLAGS_VLAN_TAG_LOC_L2TAG2) return 1; Thanks, Ciara >=20 > /Bruce