From: "Pathak, Pravin" <pravin.pathak@intel.com>
To: Jerin Jacob <jerinjacobk@gmail.com>
Cc: "dev@dpdk.org" <dev@dpdk.org>,
"jerinj@marvell.com" <jerinj@marvell.com>,
"Chen, Mike Ximing" <mike.ximing.chen@intel.com>,
"Richardson, Bruce" <bruce.richardson@intel.com>,
"thomas@monjalon.net" <thomas@monjalon.net>,
"Marchand, David" <david.marchand@redhat.com>,
"nipun.gupta@amd.com" <nipun.gupta@amd.com>,
"chenbox@nvidia.com" <chenbox@nvidia.com>,
"Sarkar, Tirthendu" <tirthendu.sarkar@intel.com>
Subject: RE: [PATCH v3 4/7] event/dlb2: support managing history list resource
Date: Wed, 18 Jun 2025 22:58:20 +0000 [thread overview]
Message-ID: <DM4PR11MB54725640D251A71DE79A366DF472A@DM4PR11MB5472.namprd11.prod.outlook.com> (raw)
In-Reply-To: <CALBAE1OOfvi-+2bnkWteS1TVYjjNT26asMCXCZ7rswOJTsCPrQ@mail.gmail.com>
> -----Original Message-----
> From: Jerin Jacob <jerinjacobk@gmail.com>
> Sent: Wednesday, June 18, 2025 5:26 AM
> To: Pathak, Pravin <pravin.pathak@intel.com>
> Cc: dev@dpdk.org; jerinj@marvell.com; Chen, Mike Ximing
> <mike.ximing.chen@intel.com>; Richardson, Bruce
> <bruce.richardson@intel.com>; thomas@monjalon.net; Marchand, David
> <david.marchand@redhat.com>; nipun.gupta@amd.com;
> chenbox@nvidia.com; Sarkar, Tirthendu <tirthendu.sarkar@intel.com>
> Subject: Re: [PATCH v3 4/7] event/dlb2: support managing history list
> resource
>
> On Wed, Jun 18, 2025 at 12:52 AM Pravin Pathak <pravin.pathak@intel.com>
> wrote:
> >
> > Add support for setting application specified port history Set HL
> > equal to CQ depth when inflight control is enabled Added command line
> > parameters 'use_default_hl' (default: 1)
> > and 'alloc_hl_entries'
> > - When 'use_default_hl = 1'
> > * Per port HL is set to DLB2_FIXED_CQ_HL_SIZE (32)
> > * Recommended CQ depth by dlb2_eventdev_port_default_conf_get()
> > is DLB2_FIXED_CQ_HL_SIZE/2
> > * command line parameter alloc_hl_entries is ignored
> > - When 'use_default_hl = 0'
> > * Per LDB port HL = 2 * CQ depth
> > * Recommended CQ depth by dlb2_eventdev_port_default_conf_get()
> > is DLB2_FIXED_CQ_HL_SIZE
> > * User should calculate needed HL entries based on CQ depths the
> > application will use and specify it as command line parameter
> > 'alloc_hl_entries'. This will be used to allocate HL entries.
> > alloc_hl_entries = (Sum of all LDB ports CQ depths * 2)
> > * If alloc_hl_entries is not specified, then
> > Total HL entries for the eventdev = num_ldb_ports * 64
> >
> > Signed-off-by: Pravin Pathak <pravin.pathak@intel.com>
> > Signed-off-by: Tirthendu Sarkar <tirthendu.sarkar@intel.com>
> > ---
>
> > -/*!
> > +/**
> > * @warning
> > * @b EXPERIMENTAL: this API may change, or be removed, without prior
> notice
> > *
> > @@ -91,6 +91,52 @@ rte_pmd_dlb2_set_token_pop_mode(uint8_t
> dev_id,
> > uint8_t port_id,
> > enum dlb2_token_pop_mode mode);
> >
> > +/** Set inflight threshold for flow migration */ #define
> > +DLB2_SET_PORT_FLOW_MIGRATION_THRESHOLD RTE_BIT64(0)
> > +
> > +/** Set port history list */
> > +#define DLB2_SET_PORT_HL RTE_BIT64(1)
> > +
> > +/**
> > + * @warning
> > + * @b EXPERIMENTAL: this API may change, or be removed, without prior
> > +notice
>
> This is NOT API
Changed it.
>
> > + *
> > + * Sets TDT threshold and HL size for a DLB2 port.
> > + */
> > +struct rte_pmd_dlb2_port_param {
> > + uint16_t inflight_threshold : 12;
> > + uint16_t port_hl;
>
> Doxygen comments for each field is missing.
Added Doxygen comments
>
>
> > +};
> > +
> > +/**
> > + * @warning
> > + * @b EXPERIMENTAL: this API may change, or be removed, without prior
> > +notice
> > + *
> > + * Configure various port parameters.
> > + * This function must be called before calling rte_event_port_setup()
> > + * for the port, and after calling rte_event_dev_configure().
> > + *
> > + * @param dev_id
> > + * The identifier of the event device.
> > + * @param port_id
> > + * The identifier of the event port.
> > + * @param flags
> > + * Bitmask of the parameters being set.
> > + * @param val
> > + * Structure coantaining the values of parameters being set.
>
> coantaining - Typo
Fixed
>
>
> > + *
> > + * @return
> > + * - 0: Success
> > + * - EINVAL: Invalid dev_id, port_id, or mode
> > + * - EINVAL: The DLB2 is not configured, is already running, or the port is
> > + * already setup
> > + */
> > +__rte_experimental
> > +int
> > +rte_pmd_dlb2_set_port_param(uint8_t dev_id,
> > + uint8_t port_id,
> > + uint64_t flags,
> > + void *val);
>
> Why void * - Is it rte_pmd_dlb2_port_param * pointer. Right?
>
> Also fix following issues
>
> 1)[for-main]dell[dpdk-next-eventdev] $ git diff HEAD~7..HEAD | grep \(void\)
> + (void) enqueue_depth;
>
> use RTE_SET_USED
Added
>
> 2)
For the following, if I try to avoid line continuation, I get the following warning.
WARNING:MULTILINE_DEREFERENCE: Avoid multiple line dereference - prefer 'qm_port->ev_port->stats.queue[ev_qid0].qid_depth[RTE_PMD_DLB2_GET_QID_DEPTH(&events[0]'
>
> ### [PATCH] event/dlb2: support managing history list resource
>
> Warning in drivers/event/dlb2/dlb2.c:
> Using %l format, prefer %PRI*64 if type is [u]int64_t
>
> ### [PATCH] event/dlb2: fix qid depth xstat in vector path
>
> WARNING:LINE_CONTINUATIONS: Avoid unnecessary line continuations
> #21: FILE: drivers/event/dlb2/dlb2.c:4148:
> + DLB2_INC_STAT(qm_port->ev_port->stats.queue[ev_qid3].\
>
> WARNING:LINE_CONTINUATIONS: Avoid unnecessary line continuations
> #30: FILE: drivers/event/dlb2/dlb2.c:4157:
> + DLB2_INC_STAT(qm_port->ev_port->stats.queue[ev_qid2].\
>
> WARNING:LINE_CONTINUATIONS: Avoid unnecessary line continuations
> #39: FILE: drivers/event/dlb2/dlb2.c:4167:
> + DLB2_INC_STAT(qm_port->ev_port->stats.queue[ev_qid1].\
>
> WARNING:LINE_CONTINUATIONS: Avoid unnecessary line continuations
> #48: FILE: drivers/event/dlb2/dlb2.c:4176:
> + DLB2_INC_STAT(qm_port->ev_port->stats.queue[ev_qid0].\
>
> total: 0 errors, 4 warnings, 32 lines checked
>
>
>
>
> > #ifdef __cplusplus
> > }
> > #endif
> > --
> > 2.39.1
> >
next prev parent reply other threads:[~2025-06-18 22:58 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-09 4:23 [PATCH v1 0/7] event/dlb2: dlb2 hw resource management Pravin Pathak
2025-05-09 4:23 ` [PATCH v1 1/7] event/dlb2: addresses deq failure when CQ depth <= 16 Pravin Pathak
2025-05-09 4:23 ` [PATCH v1 2/7] event/dlb2: changes to correctly validate COS ID arguments Pravin Pathak
2025-05-09 4:23 ` [PATCH v1 3/7] event/dlb2: return 96 single link ports for DLB2.5 Pravin Pathak
2025-05-27 5:46 ` [EXTERNAL] " Jerin Jacob
2025-05-09 4:23 ` [PATCH v1 4/7] event/dlb2: support managing history list resource Pravin Pathak
2025-05-27 5:50 ` [EXTERNAL] " Jerin Jacob
2025-05-27 5:57 ` Jerin Jacob
2025-05-27 13:16 ` Thomas Monjalon
2025-05-09 4:23 ` [PATCH v1 5/7] event/dlb2: avoid credit release race condition Pravin Pathak
2025-05-09 4:24 ` [PATCH v1 6/7] event/dlb2: update qid depth xstat in vector path Pravin Pathak
2025-05-09 4:24 ` [PATCH v1 7/7] event/dlb2: fix default credits in dlb2_eventdev_info_get() Pravin Pathak
2025-06-03 18:05 ` [PATCH v2 0/7] event/dlb2: dlb2 hw resource management Pravin Pathak
2025-06-03 18:05 ` [PATCH v2 1/7] event/dlb2: addresses deq failure when CQ depth <= 16 Pravin Pathak
2025-06-04 8:58 ` Jerin Jacob
2025-06-03 18:05 ` [PATCH v2 2/7] event/dlb2: changes to correctly validate COS ID arguments Pravin Pathak
2025-06-03 18:05 ` [PATCH v2 3/7] event/dlb2: return 96 single link ports for DLB2.5 Pravin Pathak
2025-06-03 18:05 ` [PATCH v2 4/7] event/dlb2: support managing history list resource Pravin Pathak
2025-06-03 18:05 ` [PATCH v2 5/7] event/dlb2: avoid credit release race condition Pravin Pathak
2025-06-03 18:05 ` [PATCH v2 6/7] event/dlb2: update qid depth xstat in vector path Pravin Pathak
2025-06-03 18:05 ` [PATCH v2 7/7] event/dlb2: return default credits based on HW version Pravin Pathak
2025-06-17 18:26 ` [PATCH v3 0/7] event/dlb2: dlb2 hw resource management Pravin Pathak
2025-06-17 18:26 ` [PATCH v3 1/7] event/dlb2: fix addresses deq failure when CQ depth <= 16 Pravin Pathak
2025-06-17 18:26 ` [PATCH v3 2/7] event/dlb2: fix validaton of LDB port COS ID arguments Pravin Pathak
2025-06-17 18:26 ` [PATCH v3 3/7] event/dlb2: fix num single link ports for DLB2.5 Pravin Pathak
2025-06-17 18:26 ` [PATCH v3 4/7] event/dlb2: support managing history list resource Pravin Pathak
2025-06-18 9:26 ` Jerin Jacob
2025-06-18 22:58 ` Pathak, Pravin [this message]
2025-06-17 18:26 ` [PATCH v3 5/7] event/dlb2: fix to avoid credit release race condition Pravin Pathak
2025-06-17 18:26 ` [PATCH v3 6/7] event/dlb2: fix qid depth xstat in vector path Pravin Pathak
2025-06-17 18:26 ` [PATCH v3 7/7] event/dlb2: fix default credits based on HW version Pravin Pathak
2025-06-19 4:03 ` [PATCH v4 0/7] event/dlb2: dlb2 hw resource management Pravin Pathak
2025-06-19 4:03 ` [PATCH v4 1/7] event/dlb2: fix addresses deq failure when CQ depth <= 16 Pravin Pathak
2025-06-19 4:03 ` [PATCH v4 2/7] event/dlb2: fix validaton of LDB port COS ID arguments Pravin Pathak
2025-06-19 4:03 ` [PATCH v4 3/7] event/dlb2: fix num single link ports for DLB2.5 Pravin Pathak
2025-06-19 4:03 ` [PATCH v4 4/7] event/dlb2: support managing history list resource Pravin Pathak
2025-06-19 4:03 ` [PATCH v4 5/7] event/dlb2: fix to avoid credit release race condition Pravin Pathak
2025-06-19 4:03 ` [PATCH v4 6/7] event/dlb2: fix qid depth xstat in vector path Pravin Pathak
2025-06-19 4:03 ` [PATCH v4 7/7] event/dlb2: fix default credits based on HW version Pravin Pathak
2025-06-19 8:37 ` Jerin Jacob
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