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From: "Zhang, Qi Z" <qi.z.zhang@intel.com>
To: "Ye, MingjinX" <mingjinx.ye@intel.com>, "dev@dpdk.org" <dev@dpdk.org>
CC: "Yang, Qiming" <qiming.yang@intel.com>, "stable@dpdk.org"
<stable@dpdk.org>, "Zhou, YidingX" <yidingx.zhou@intel.com>, "Zhang, Ke1X"
<ke1x.zhang@intel.com>
Subject: RE: [PATCH v5] net/ice: fix ice dcf control thread crash
Thread-Topic: [PATCH v5] net/ice: fix ice dcf control thread crash
Thread-Index: AQHZWxC7K+e3peQS6kWvK4+rjfE4sK8DmqgggADjKQCAAKDoYA==
Date: Tue, 21 Mar 2023 11:55:19 +0000
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Errors-To: dev-bounces@dpdk.org
> -----Original Message-----
> From: Ye, MingjinX <mingjinx.ye@intel.com>
> Sent: Tuesday, March 21, 2023 10:08 AM
> To: Zhang, Qi Z <qi.z.zhang@intel.com>; dev@dpdk.org
> Cc: Yang, Qiming <qiming.yang@intel.com>; stable@dpdk.org; Zhou, YidingX
> <yidingx.zhou@intel.com>; Zhang, Ke1X <ke1x.zhang@intel.com>
> Subject: RE: [PATCH v5] net/ice: fix ice dcf control thread crash
>=20
> Hi Qi, here is my new solution, can you give me some good suggestions.
> 1. remove the 'vc_event_msg_cb =3D=3D NULL' related processing and let ea=
ch
> 'ice-rest' thread, end normally.
> 2. Define vsi_update_thread_num as rte_atomic32_t.
>=20
> > -----Original Message-----
> > From: Zhang, Qi Z <qi.z.zhang@intel.com>
> > Sent: 2023=1B$BG/=1B(B3=1B$B7n=1B(B20=1B$BF|=1B(B 20:53
> > To: Ye, MingjinX <mingjinx.ye@intel.com>; dev@dpdk.org
> > Cc: Yang, Qiming <qiming.yang@intel.com>; stable@dpdk.org; Zhou,
> > YidingX <yidingx.zhou@intel.com>; Zhang, Ke1X <ke1x.zhang@intel.com>
> > Subject: RE: [PATCH v5] net/ice: fix ice dcf control thread crash
>=20
> > > for (;;) {
> > > + if (hw->vc_event_msg_cb =3D=3D NULL)
> > > + break;
> > Can you explain why this is required, seems it not related with your
> > commit log
> The purpose of this is to bring all 'ice-reset' threads to a quick end wh=
en hw
> is released.
I don't understand, the vc_event_msg_cb was initialized in ice_dcf_dev_init=
and never be reset why we need this check, anything I missed?
>=20
> > >
> > > - rte_intr_enable(pci_dev->intr_handle);
> > > - ice_dcf_enable_irq0(hw);
> > > + if (hw->vc_event_msg_cb !=3D NULL) {
> > > + rte_intr_enable(pci_dev->intr_handle);
> > > + ice_dcf_enable_irq0(hw);
> >
> > Same question as above
> These are called when HW releases the resource. Therefore, there is no ne=
ed
> to call.
>=20
> > > + rte_spinlock_lock(&dcf_hw->vsi_thread_lock);
> > > + dcf_hw->vsi_update_thread_num++;
> > > + rte_spinlock_unlock(&dcf_hw->vsi_thread_lock);
> >
> > I think you can define vsi_update_thread_num as rte_atomic32_t and use
> > rte_atomic32_add/sub
> At first I chose the rte_atomic32_t option, which is not very elegant usi=
ng
> spinlock.
> The 'checkpatches.sh' script gives a warning ('Using rte_atomicNN_xxx') w=
hen
> it is executed. I saw the comment on line 89 of the script (# refrain fro=
m new
> additions of 16/32/64 bits rte_atomicNN_xxx()), so I went with the spinlo=
ck
> solution.
You are right, rte_atomicNN_xxx will be deprecated, and should not be used
We can use the gcc build-in function __atomic_fetch_add/sub as an alternati=
ve, sp
>=20
>=20