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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM4PR11MB5994.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 438c91b8-6cf5-4f08-26db-08dbbfd42da2 X-MS-Exchange-CrossTenant-originalarrivaltime: 28 Sep 2023 03:37:02.2383 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: OR4GKtOz4qIX57MXgEqXYwgYh/PPfuq1D6ya3JhHw0wyFTEo7JmLM9cacjhsy7KiGqO16AHjqPN7CmzR80mPKQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR11MB5805 X-OriginatorOrg: intel.com X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org > -----Original Message----- > From: Zhang, Yuying > Sent: Wednesday, September 27, 2023 8:54 PM > To: Zhang, Yuying ; dev@dpdk.org; Zhang, Qi Z > ; Wu, Jingjing ; Xing, Beile= i > > Subject: [PATCH v8 0/9] add rte flow support for cpfl >=20 > From: Yuying Zhang >=20 > This patchset add rte flow support for cpfl driver. > It depends on the following patch set: > http://patchwork.dpdk.org/project/dpdk/cover/20230912173039.1612287-1- > beilei.xing@intel.com/ >=20 > Wenjing Qiao (2): > net/cpfl: add json parser for rte flow pattern rules > net/cpfl: build action mapping rules from JSON >=20 > Yuying Zhang (7): > net/cpfl: set up rte flow skeleton > net/cpfl: set up control path > net/cpfl: add FXP low level implementation > net/cpfl: add fxp rule module > net/cpfl: add fxp flow engine > net/cpfl: add flow support for representor > net/cpfl: add support of to represented port action > --- > v8: > * fix compile issues > * refine document and separate patch with different features > v7: > * refine commit log > * fix compile issues >=20 > v6: > * use existed jansson instead of json-c library. > * refine "add FXP low level implementation" >=20 > V5: > * Add input validation for some functions. >=20 > doc/guides/nics/cpfl.rst | 52 + > doc/guides/rel_notes/release_23_11.rst | 1 + > drivers/net/cpfl/cpfl_actions.h | 858 +++++++++++ > drivers/net/cpfl/cpfl_controlq.c | 801 ++++++++++ > drivers/net/cpfl/cpfl_controlq.h | 75 + > drivers/net/cpfl/cpfl_ethdev.c | 392 ++++- > drivers/net/cpfl/cpfl_ethdev.h | 128 ++ > drivers/net/cpfl/cpfl_flow.c | 339 +++++ > drivers/net/cpfl/cpfl_flow.h | 85 ++ > drivers/net/cpfl/cpfl_flow_engine_fxp.c | 667 ++++++++ > drivers/net/cpfl/cpfl_flow_parser.c | 1839 +++++++++++++++++++++++ > drivers/net/cpfl/cpfl_flow_parser.h | 267 ++++ > drivers/net/cpfl/cpfl_fxp_rule.c | 296 ++++ > drivers/net/cpfl/cpfl_fxp_rule.h | 68 + > drivers/net/cpfl/cpfl_representor.c | 29 + > drivers/net/cpfl/cpfl_rules.c | 127 ++ > drivers/net/cpfl/cpfl_rules.h | 306 ++++ > drivers/net/cpfl/cpfl_vchnl.c | 144 ++ > drivers/net/cpfl/meson.build | 12 + > 19 files changed, 6485 insertions(+), 1 deletion(-) create mode 100644 > drivers/net/cpfl/cpfl_actions.h create mode 100644 > drivers/net/cpfl/cpfl_controlq.c create mode 100644 > drivers/net/cpfl/cpfl_controlq.h create mode 100644 > drivers/net/cpfl/cpfl_flow.c create mode 100644 drivers/net/cpfl/cpfl_fl= ow.h > create mode 100644 drivers/net/cpfl/cpfl_flow_engine_fxp.c > create mode 100644 drivers/net/cpfl/cpfl_flow_parser.c > create mode 100644 drivers/net/cpfl/cpfl_flow_parser.h > create mode 100644 drivers/net/cpfl/cpfl_fxp_rule.c create mode 100644 > drivers/net/cpfl/cpfl_fxp_rule.h create mode 100644 > drivers/net/cpfl/cpfl_rules.c create mode 100644 drivers/net/cpfl/cpfl_r= ules.h >=20 > -- > 2.34.1 Please fix one checkpatch warning on PATCH 6 and also rebase to latest dpdk= -next-net-intel in new version. Otherwise Acked-by: Qi Zhang