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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM4PR11MB5994.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 574e6a7b-e32f-4e7a-b6a1-08daa030ba5b X-MS-Exchange-CrossTenant-originalarrivaltime: 27 Sep 2022 02:33:57.1481 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: DSWWtp73eQwnwUZ85yJJ3UQlL06o3jNj4ySlZy+MjBa3G7g0PT5siR5bzQLvZj58b/uh/RY6eRs8wThNzraNQw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA2PR11MB4953 X-OriginatorOrg: intel.com X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org > -----Original Message----- > From: Zeng, ZhichaoX > Sent: Monday, September 26, 2022 1:17 PM > To: dev@dpdk.org > Cc: Yang, Qiming ; Zhou, YidingX > ; Zhang, Qi Z ; Zeng, > ZhichaoX ; Wu, Jingjing ; > Xing, Beilei ; Sinha, Abhijit ; > Doherty, Declan ; Nicolau, Radu > > Subject: [PATCH v2] net/iavf: fix TSO offload for tunnel case >=20 > This patch is to fix the tunnel TSO not enabling issue, simplify the logi= c of > calculating 'Tx Buffer Size' of data descriptor with IPSec and fix handli= ng that > the mbuf size exceeds the TX descriptor hardware limit(1B-16KB) which > causes malicious behavior to the NIC. >=20 > Fixes: 1e728b01120c ("net/iavf: rework Tx path") >=20 > --- > v2: rework patch >=20 > Signed-off-by: Zhichao Zeng > --- > drivers/common/iavf/iavf_osdep.h | 2 + > drivers/net/iavf/iavf_rxtx.c | 95 +++++++++++++++++++------------- > 2 files changed, 59 insertions(+), 38 deletions(-) >=20 > diff --git a/drivers/common/iavf/iavf_osdep.h > b/drivers/common/iavf/iavf_osdep.h > index 31d3d809f9..bf1436dfc6 100644 > --- a/drivers/common/iavf/iavf_osdep.h > +++ b/drivers/common/iavf/iavf_osdep.h > @@ -126,6 +126,8 @@ writeq(uint64_t value, volatile void *addr) #define > iavf_memset(a, b, c, d) memset((a), (b), (c)) #define iavf_memcpy(a, b, = c, d) > rte_memcpy((a), (b), (c)) >=20 > +#define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d)) > + This looks like not necessary be added in osdep.h Can we simply make it local or at some header file in net/iavf, so we don'= t need to have a patch that cross the modules. > #define iavf_usec_delay(x) rte_delay_us_sleep(x) #define > iavf_msec_delay(x) iavf_usec_delay(1000 * (x)) >=20 > diff --git a/drivers/net/iavf/iavf_rxtx.c b/drivers/net/iavf/iavf_rxtx.c = index > 109ba756f8..a06d9d3da6 100644 > --- a/drivers/net/iavf/iavf_rxtx.c > +++ b/drivers/net/iavf/iavf_rxtx.c > @@ -2417,7 +2417,7 @@ iavf_fill_ctx_desc_segmentation_field(volatile > uint64_t *field, > total_length =3D m->pkt_len - (m->l2_len + m->l3_len + m- > >l4_len); >=20 > if (m->ol_flags & RTE_MBUF_F_TX_TUNNEL_MASK) > - total_length -=3D m->outer_l3_len; > + total_length -=3D m->outer_l3_len + m->outer_l2_len; > } >=20 > #ifdef RTE_LIBRTE_IAVF_DEBUG_TX > @@ -2581,50 +2581,39 @@ iavf_build_data_desc_cmd_offset_fields(volatile > uint64_t *qw1, > ((uint64_t)l2tag1 << > IAVF_TXD_DATA_QW1_L2TAG1_SHIFT)); } >=20 > +/* HW requires that TX buffer size ranges from 1B up to (16K-1)B. */ > +#define IAVF_MAX_DATA_PER_TXD \ > + (IAVF_TXD_QW1_TX_BUF_SZ_MASK >> > IAVF_TXD_QW1_TX_BUF_SZ_SHIFT) > + > +/* Calculate the number of TX descriptors needed for each pkt */ static > +inline uint16_t iavf_calc_pkt_desc(struct rte_mbuf *tx_pkt) { > + struct rte_mbuf *txd =3D tx_pkt; > + uint16_t count =3D 0; > + > + while (txd !=3D NULL) { > + count +=3D DIV_ROUND_UP(txd->data_len, > IAVF_MAX_DATA_PER_TXD); > + txd =3D txd->next; > + } > + > + return count; > +} > + > static inline void > iavf_fill_data_desc(volatile struct iavf_tx_desc *desc, > - struct rte_mbuf *m, uint64_t desc_template, > - uint16_t tlen, uint16_t ipseclen) > + uint64_t desc_template, uint16_t buffsz, > + uint64_t buffer_addr) > { > - uint32_t hdrlen =3D m->l2_len; > - uint32_t bufsz =3D 0; > - > /* fill data descriptor qw1 from template */ > desc->cmd_type_offset_bsz =3D desc_template; >=20 > - /* set data buffer address */ > - desc->buffer_addr =3D rte_mbuf_data_iova(m); > - > - /* calculate data buffer size less set header lengths */ > - if ((m->ol_flags & RTE_MBUF_F_TX_TUNNEL_MASK) && > - (m->ol_flags & (RTE_MBUF_F_TX_TCP_SEG | > - RTE_MBUF_F_TX_UDP_SEG))) { > - hdrlen +=3D m->outer_l3_len; > - if (m->ol_flags & RTE_MBUF_F_TX_L4_MASK) > - hdrlen +=3D m->l3_len + m->l4_len; > - else > - hdrlen +=3D m->l3_len; > - if (m->ol_flags & RTE_MBUF_F_TX_SEC_OFFLOAD) > - hdrlen +=3D ipseclen; > - bufsz =3D hdrlen + tlen; > - } else if ((m->ol_flags & RTE_MBUF_F_TX_SEC_OFFLOAD) && > - (m->ol_flags & (RTE_MBUF_F_TX_TCP_SEG | > - RTE_MBUF_F_TX_UDP_SEG))) { > - hdrlen +=3D m->outer_l3_len + m->l3_len + ipseclen; > - if (m->ol_flags & RTE_MBUF_F_TX_L4_MASK) > - hdrlen +=3D m->l4_len; > - bufsz =3D hdrlen + tlen; > - > - } else { > - bufsz =3D m->data_len; > - } > - > /* set data buffer size */ > desc->cmd_type_offset_bsz |=3D > - (((uint64_t)bufsz << > IAVF_TXD_DATA_QW1_TX_BUF_SZ_SHIFT) & > + (((uint64_t)buffsz << > IAVF_TXD_DATA_QW1_TX_BUF_SZ_SHIFT) & > IAVF_TXD_DATA_QW1_TX_BUF_SZ_MASK); >=20 > - desc->buffer_addr =3D rte_cpu_to_le_64(desc->buffer_addr); > + desc->buffer_addr =3D rte_cpu_to_le_64(buffer_addr); > desc->cmd_type_offset_bsz =3D rte_cpu_to_le_64(desc- > >cmd_type_offset_bsz); > } >=20 > @@ -2649,8 +2638,10 @@ iavf_xmit_pkts(void *tx_queue, struct rte_mbuf > **tx_pkts, uint16_t nb_pkts) > struct iavf_tx_entry *txe_ring =3D txq->sw_ring; > struct iavf_tx_entry *txe, *txn; > struct rte_mbuf *mb, *mb_seg; > + uint64_t buf_dma_addr; > uint16_t desc_idx, desc_idx_last; > uint16_t idx; > + uint16_t slen; >=20 >=20 > /* Check if the descriptor ring needs to be cleaned. */ @@ -2689,8 > +2680,14 @@ iavf_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, > uint16_t nb_pkts) > * The number of descriptors that must be allocated for > * a packet equals to the number of the segments of that > * packet plus the context and ipsec descriptors if needed. > + * Recalculate the needed tx descs when TSO enabled in case > + * the mbuf data size exceeds max data size that hw allows > + * per tx desc. > */ > - nb_desc_required =3D nb_desc_data + nb_desc_ctx + > nb_desc_ipsec; > + if (mb->ol_flags & RTE_MBUF_F_TX_TCP_SEG) > + nb_desc_required =3D iavf_calc_pkt_desc(mb) + > nb_desc_ctx + nb_desc_ipsec; > + else > + nb_desc_required =3D nb_desc_data + nb_desc_ctx + > nb_desc_ipsec; >=20 > desc_idx_last =3D (uint16_t)(desc_idx + nb_desc_required - 1); >=20 > @@ -2786,8 +2783,30 @@ iavf_xmit_pkts(void *tx_queue, struct rte_mbuf > **tx_pkts, uint16_t nb_pkts) > rte_pktmbuf_free_seg(txe->mbuf); >=20 > txe->mbuf =3D mb_seg; > - iavf_fill_data_desc(ddesc, mb_seg, > - ddesc_template, tlen, ipseclen); > + slen =3D mb_seg->data_len; > + if (mb_seg->ol_flags & > RTE_MBUF_F_TX_SEC_OFFLOAD) > + slen +=3D ipseclen; > + buf_dma_addr =3D rte_mbuf_data_iova(mb_seg); > + while ((mb_seg->ol_flags & > (RTE_MBUF_F_TX_TCP_SEG | > + RTE_MBUF_F_TX_UDP_SEG)) && > + unlikely(slen > > IAVF_MAX_DATA_PER_TXD)) { > + iavf_fill_data_desc(ddesc, ddesc_template, > + IAVF_MAX_DATA_PER_TXD, > buf_dma_addr); > + > + IAVF_DUMP_TX_DESC(txq, ddesc, desc_idx); > + > + buf_dma_addr +=3D > IAVF_MAX_DATA_PER_TXD; > + slen -=3D IAVF_MAX_DATA_PER_TXD; > + > + txe->last_id =3D desc_idx_last; > + desc_idx =3D txe->next_id; > + txe =3D txn; > + ddesc =3D &txr[desc_idx]; > + txn =3D &txe_ring[txe->next_id]; > + } > + > + iavf_fill_data_desc(ddesc, ddesc_template, > + slen, buf_dma_addr); >=20 > IAVF_DUMP_TX_DESC(txq, ddesc, desc_idx); >=20 > -- > 2.25.1