From: Raslan Darawsheh <rasland@nvidia.com>
To: Alexander Kozyrev <akozyrev@nvidia.com>, "dev@dpdk.org" <dev@dpdk.org>
Cc: Slava Ovsiienko <viacheslavo@nvidia.com>, Matan Azrad <matan@nvidia.com>
Subject: Re: [dpdk-dev] [PATCH] net/mlx5: convert meta register to big-endian
Date: Thu, 17 Jun 2021 11:40:47 +0000 [thread overview]
Message-ID: <DM4PR12MB505426D5A3A15FD1B8A7E956CF0E9@DM4PR12MB5054.namprd12.prod.outlook.com> (raw)
In-Reply-To: <20210616144602.2803271-1-akozyrev@nvidia.com>
Hi,
> -----Original Message-----
> From: Alexander Kozyrev <akozyrev@nvidia.com>
> Sent: Wednesday, June 16, 2021 5:46 PM
> To: dev@dpdk.org
> Cc: Raslan Darawsheh <rasland@nvidia.com>; Slava Ovsiienko
> <viacheslavo@nvidia.com>; Matan Azrad <matan@nvidia.com>
> Subject: [PATCH] net/mlx5: convert meta register to big-endian
>
> Metadata is stored in the CPU order (little-endian format on x86),
> while all the packet header fields are stored in the network order.
> That leads to the wrong results whenever we try to use the metadata
> value in the modify_field actions: bytes are swapped as a result.
>
> Convert the metadata into the big-endian format before storing it
> in the Mellanox NIC to achieve consistent behaviour.
>
> Signed-off-by: Alexander Kozyrev <akozyrev@nvidia.com>
> Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Patch applied to next-net-mlx,
Kindest regards,
Raslan Darawsheh
prev parent reply other threads:[~2021-06-17 11:40 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-16 14:46 Alexander Kozyrev
2021-06-17 11:40 ` Raslan Darawsheh [this message]
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