From: Raslan Darawsheh <rasland@nvidia.com>
To: Michael Baum <michaelba@nvidia.com>, "dev@dpdk.org" <dev@dpdk.org>
Cc: Matan Azrad <matan@nvidia.com>,
Slava Ovsiienko <viacheslavo@nvidia.com>,
"stable@dpdk.org" <stable@dpdk.org>
Subject: RE: [PATCH] common/mlx5: fix user mode register access attribute
Date: Wed, 17 Nov 2021 14:43:21 +0000 [thread overview]
Message-ID: <DM4PR12MB5312F5A8338B75E0DB6BA573CF9A9@DM4PR12MB5312.namprd12.prod.outlook.com> (raw)
In-Reply-To: <20211117105709.2059941-1-michaelba@nvidia.com>
Hi,
> -----Original Message-----
> From: Michael Baum <michaelba@nvidia.com>
> Sent: Wednesday, November 17, 2021 12:57 PM
> To: dev@dpdk.org
> Cc: Matan Azrad <matan@nvidia.com>; Raslan Darawsheh
> <rasland@nvidia.com>; Slava Ovsiienko <viacheslavo@nvidia.com>; Michael
> Baum <michaelba@nvidia.com>; stable@dpdk.org
> Subject: [PATCH] common/mlx5: fix user mode register access attribute
>
> From: Michael Baum <michaelba@nvidia.com>
>
> To detect the timestamp mode configured on the NIC the mlx5 PMD uses
> the
> firmware command ACCESS_REGISTER_USER.
> The HCA capability command has an attribute flag checking whether
> firmware supports the command.
>
> However, the HCA capability query command read the flag from wrong place
> in PRM structure.
>
> This patch move the plag to correct place.
>
> Fixes: 972a1bf8120d ("common/mlx5: fix user mode register access
> command")
> Cc: stable@dpdk.org
>
> Signed-off-by: Michael Baum <michaelba@nvidia.com>
> Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Patch applied to next-net-mlx,
Kindest regards,
Raslan Darawsheh
prev parent reply other threads:[~2021-11-17 14:43 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-17 10:57 michaelba
2021-11-17 14:43 ` Raslan Darawsheh [this message]
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