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charset="windows-1255" Content-Transfer-Encoding: quoted-printable Series-acked-by: Matan Azrad > =F7=E1=EC =FEOutlook =F2=E1=E5=F8 Android=FE ________________________________ From: Spike Du Sent: Tuesday, June 7, 2022 3:59:36 PM To: Matan Azrad ; Slava Ovsiienko ; Ori Kam ; NBU-Contact-Thomas Monjalon (EXTERNAL) Cc: andrew.rybchenko@oktetlabs.ru ; stephen@= networkplumber.org ; mb@smartsharesystems.com <= mb@smartsharesystems.com>; dev@dpdk.org ; Raslan Darawsheh Subject: [PATCH v5 1/7] net/mlx5: add LWM support for Rxq Add lwm(Limit WaterMark) field to Rxq object which indicates the percentage of RX queue size used by HW to raise LWM event to the user. Allow LWM setting in modify_rq command. Allow the LWM configuration dynamically by adding RDY2RDY state change. Signed-off-by: Spike Du --- drivers/net/mlx5/mlx5.h | 1 + drivers/net/mlx5/mlx5_devx.c | 13 ++++++++++++- drivers/net/mlx5/mlx5_devx.h | 1 + drivers/net/mlx5/mlx5_rx.h | 1 + 4 files changed, 15 insertions(+), 1 deletion(-) diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h index ef755ee..305edff 100644 --- a/drivers/net/mlx5/mlx5.h +++ b/drivers/net/mlx5/mlx5.h @@ -1395,6 +1395,7 @@ enum mlx5_rxq_modify_type { MLX5_RXQ_MOD_RST2RDY, /* modify state from reset to ready. */ MLX5_RXQ_MOD_RDY2ERR, /* modify state from ready to error. */ MLX5_RXQ_MOD_RDY2RST, /* modify state from ready to reset. */ + MLX5_RXQ_MOD_RDY2RDY, /* modify state from ready to ready. */ }; enum mlx5_txq_modify_type { diff --git a/drivers/net/mlx5/mlx5_devx.c b/drivers/net/mlx5/mlx5_devx.c index 4b48f94..c918a50 100644 --- a/drivers/net/mlx5/mlx5_devx.c +++ b/drivers/net/mlx5/mlx5_devx.c @@ -62,7 +62,7 @@ * @return * 0 on success, a negative errno value otherwise and rte_errno is set. */ -static int +int mlx5_devx_modify_rq(struct mlx5_rxq_priv *rxq, uint8_t type) { struct mlx5_devx_modify_rq_attr rq_attr; @@ -76,6 +76,11 @@ case MLX5_RXQ_MOD_RST2RDY: rq_attr.rq_state =3D MLX5_RQC_STATE_RST; rq_attr.state =3D MLX5_RQC_STATE_RDY; + if (rxq->lwm) { + rq_attr.modify_bitmask |=3D + MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_WQ_LWM; + rq_attr.lwm =3D rxq->lwm; + } break; case MLX5_RXQ_MOD_RDY2ERR: rq_attr.rq_state =3D MLX5_RQC_STATE_RDY; @@ -85,6 +90,12 @@ rq_attr.rq_state =3D MLX5_RQC_STATE_RDY; rq_attr.state =3D MLX5_RQC_STATE_RST; break; + case MLX5_RXQ_MOD_RDY2RDY: + rq_attr.rq_state =3D MLX5_RQC_STATE_RDY; + rq_attr.state =3D MLX5_RQC_STATE_RDY; + rq_attr.modify_bitmask |=3D MLX5_MODIFY_RQ_IN_MODIFY_BITMAS= K_WQ_LWM; + rq_attr.lwm =3D rxq->lwm; + break; default: break; } diff --git a/drivers/net/mlx5/mlx5_devx.h b/drivers/net/mlx5/mlx5_devx.h index a95207a..ebd1da4 100644 --- a/drivers/net/mlx5/mlx5_devx.h +++ b/drivers/net/mlx5/mlx5_devx.h @@ -11,6 +11,7 @@ int mlx5_txq_devx_modify(struct mlx5_txq_obj *obj, enum mlx5_txq_modify_type type, uint8_t dev_port)= ; void mlx5_txq_devx_obj_release(struct mlx5_txq_obj *txq_obj); +int mlx5_devx_modify_rq(struct mlx5_rxq_priv *rxq, uint8_t type); extern struct mlx5_obj_ops devx_obj_ops; diff --git a/drivers/net/mlx5/mlx5_rx.h b/drivers/net/mlx5/mlx5_rx.h index e715ed6..25a5f2c 100644 --- a/drivers/net/mlx5/mlx5_rx.h +++ b/drivers/net/mlx5/mlx5_rx.h @@ -175,6 +175,7 @@ struct mlx5_rxq_priv { struct mlx5_devx_rq devx_rq; struct rte_eth_hairpin_conf hairpin_conf; /* Hairpin configuration= . */ uint32_t hairpin_status; /* Hairpin binding status. */ + uint32_t lwm:16; }; /* External RX queue descriptor. */ -- 1.8.3.1 --_000_DM4PR12MB5389875B617DA1592FCE6C2FDFA49DM4PR12MB5389namp_ Content-Type: text/html; charset="windows-1255" Content-Transfer-Encoding: quoted-printable Series-acked-by: Matan Azrad <matan@nvidia.com= >

From: Spike Du <spiked@n= vidia.com>
Sent: Tuesday, June 7, 2022 3:59:36 PM
To: Matan Azrad <matan@nvidia.com>; Slava Ovsiienko <viache= slavo@nvidia.com>; Ori Kam <orika@nvidia.com>; NBU-Contact-Thomas = Monjalon (EXTERNAL) <thomas@monjalon.net>
Cc: andrew.rybchenko@oktetlabs.ru <andrew.rybchenko@oktetlabs.ru&= gt;; stephen@networkplumber.org <stephen@networkplumber.org>; mb@smar= tsharesystems.com <mb@smartsharesystems.com>; dev@dpdk.org <dev@dp= dk.org>; Raslan Darawsheh <rasland@nvidia.com>
Subject: [PATCH v5 1/7] net/mlx5: add LWM support for Rxq
 
Add lwm(Limit WaterMark) field to Rxq object which= indicates the percentage
of RX queue size used by HW to raise LWM event to the user.
Allow LWM setting in modify_rq command.
Allow the LWM configuration dynamically by adding RDY2RDY state change.

Signed-off-by: Spike Du <spiked@nvidia.com>
---
 drivers/net/mlx5/mlx5.h      |  1 +
 drivers/net/mlx5/mlx5_devx.c | 13 ++++++++++++-
 drivers/net/mlx5/mlx5_devx.h |  1 +
 drivers/net/mlx5/mlx5_rx.h   |  1 +
 4 files changed, 15 insertions(+), 1 deletion(-)

diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index ef755ee..305edff 100644
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -1395,6 +1395,7 @@ enum mlx5_rxq_modify_type {
         MLX5_RXQ_MOD_RST2RDY, /* m= odify state from reset to ready. */
         MLX5_RXQ_MOD_RDY2ERR, /* m= odify state from ready to error. */
         MLX5_RXQ_MOD_RDY2RST, /* m= odify state from ready to reset. */
+       MLX5_RXQ_MOD_RDY2RDY, /* modify state= from ready to ready. */
 };
 
 enum mlx5_txq_modify_type {
diff --git a/drivers/net/mlx5/mlx5_devx.c b/drivers/net/mlx5/mlx5_devx.c index 4b48f94..c918a50 100644
--- a/drivers/net/mlx5/mlx5_devx.c
+++ b/drivers/net/mlx5/mlx5_devx.c
@@ -62,7 +62,7 @@
  * @return
  *   0 on success, a negative errno value otherwise and rte= _errno is set.
  */
-static int
+int
 mlx5_devx_modify_rq(struct mlx5_rxq_priv *rxq, uint8_t type)
 {
         struct mlx5_devx_modify_rq= _attr rq_attr;
@@ -76,6 +76,11 @@
         case MLX5_RXQ_MOD_RST2RDY:=
            &nb= sp;    rq_attr.rq_state =3D MLX5_RQC_STATE_RST;
            &nb= sp;    rq_attr.state =3D MLX5_RQC_STATE_RDY;
+            &n= bsp;  if (rxq->lwm) {
+            &n= bsp;          rq_attr.modify_b= itmask |=3D
+            &n= bsp;            = ;      MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_WQ_LWM; +            &n= bsp;          rq_attr.lwm =3D = rxq->lwm;
+            &n= bsp;  }
            &nb= sp;    break;
         case MLX5_RXQ_MOD_RDY2ERR:=
            &nb= sp;    rq_attr.rq_state =3D MLX5_RQC_STATE_RDY;
@@ -85,6 +90,12 @@
            &nb= sp;    rq_attr.rq_state =3D MLX5_RQC_STATE_RDY;
            &nb= sp;    rq_attr.state =3D MLX5_RQC_STATE_RST;
            &nb= sp;    break;
+       case MLX5_RXQ_MOD_RDY2RDY:
+            &n= bsp;  rq_attr.rq_state =3D MLX5_RQC_STATE_RDY;
+            &n= bsp;  rq_attr.state =3D MLX5_RQC_STATE_RDY;
+            &n= bsp;  rq_attr.modify_bitmask |=3D MLX5_MODIFY_RQ_IN_MODIFY_BITMASK_WQ_= LWM;
+            &n= bsp;  rq_attr.lwm =3D rxq->lwm;
+            &n= bsp;  break;
         default:
            &nb= sp;    break;
         }
diff --git a/drivers/net/mlx5/mlx5_devx.h b/drivers/net/mlx5/mlx5_devx.h index a95207a..ebd1da4 100644
--- a/drivers/net/mlx5/mlx5_devx.h
+++ b/drivers/net/mlx5/mlx5_devx.h
@@ -11,6 +11,7 @@
 int mlx5_txq_devx_modify(struct mlx5_txq_obj *obj,
            &nb= sp;            = enum mlx5_txq_modify_type type, uint8_t dev_port);
 void mlx5_txq_devx_obj_release(struct mlx5_txq_obj *txq_obj);
+int mlx5_devx_modify_rq(struct mlx5_rxq_priv *rxq, uint8_t type);
 
 extern struct mlx5_obj_ops devx_obj_ops;
 
diff --git a/drivers/net/mlx5/mlx5_rx.h b/drivers/net/mlx5/mlx5_rx.h
index e715ed6..25a5f2c 100644
--- a/drivers/net/mlx5/mlx5_rx.h
+++ b/drivers/net/mlx5/mlx5_rx.h
@@ -175,6 +175,7 @@ struct mlx5_rxq_priv {
         struct mlx5_devx_rq devx_r= q;
         struct rte_eth_hairpin_con= f hairpin_conf; /* Hairpin configuration. */
         uint32_t hairpin_status; /= * Hairpin binding status. */
+       uint32_t lwm:16;
 };
 
 /* External RX queue descriptor. */
--
1.8.3.1

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