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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM4PR12MB7549.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 9b454ddf-be24-4d58-d046-08dcf772c14d X-MS-Exchange-CrossTenant-originalarrivaltime: 28 Oct 2024 17:05:42.0735 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: iDyLUJge59h8y9OYyiMtwfdsRvrEqexjHlPm7iIUZCTNFDFuZKT1BQIp3j0lSb0/eSiXsDju38KrZHIYcl9hiw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR12MB8243 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions <dev.dpdk.org> List-Unsubscribe: <https://mails.dpdk.org/options/dev>, <mailto:dev-request@dpdk.org?subject=unsubscribe> List-Archive: <http://mails.dpdk.org/archives/dev/> List-Post: <mailto:dev@dpdk.org> List-Help: <mailto:dev-request@dpdk.org?subject=help> List-Subscribe: <https://mails.dpdk.org/listinfo/dev>, <mailto:dev-request@dpdk.org?subject=subscribe> Errors-To: dev-bounces@dpdk.org > -----Original Message----- > From: Stephen Hemminger <stephen@networkplumber.org> > Sent: Monday, October 28, 2024 5:52 PM > To: Slava Ovsiienko <viacheslavo@nvidia.com> > Cc: dev@dpdk.org; Raslan Darawsheh <rasland@nvidia.com>; Matan Azrad > <matan@nvidia.com>; Suanming Mou <suanmingm@nvidia.com> > Subject: Re: [PATCH 1/1] doc: virtual function MTU settings has no meanin= g >=20 > On Mon, 28 Oct 2024 16:45:09 +0200 > Viacheslav Ovsiienko <viacheslavo@nvidia.com> wrote: >=20 > > There is the mlx5 NIC limitations - configuring MTU for PCI Virtual > > Function has no meaning. The actual maximal packet size in VF's > > receiving is limited by MTU configured on the related PCI Physical > > Function, the DPDK datapath running over VF should be prepared to > > handle packets of this maximal size. > > > > Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com> > > --- > > doc/guides/nics/mlx5.rst | 7 +++++++ > > 1 file changed, 7 insertions(+) > > > > diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst index > > 8d1a1311d4..c7dcb74da7 100644 > > --- a/doc/guides/nics/mlx5.rst > > +++ b/doc/guides/nics/mlx5.rst > > @@ -191,6 +191,13 @@ Limitations > > - IPv4/TCP with CVLAN filtering > > - L4 steering rules for port RSS of UDP, TCP and IP > > > > +- PCI Virtual Function MTU: > > + > > + Configuring MTU for PCI Virtual Function has no meaning. > > + The actual maximal packet size in VF's receiving is limited by MTU > > + configured on the related PCI Physical Function, the DPDK datapath > > + running over VF should be prepared to handle packets of this maximal > size. > > + >=20 > This is true of many drivers not just MLX5. >=20 > And it is generally true that Maximum Receive Unit (MRU) can be larger th= an > Maximum Transmit Unit (MTU). >=20 > I would rather see a more precise definition of MTU in DPDK show up in > ethdev documentation than sprinkling bits in each vendor driver. There is the specifics for mlx5 - it operates in "bifurcated mode", mlx5 PMD inherits/configures the MTU system settings, not the hardware ones= directly. So, MTU naming looks like to be correct. And, from time to time, we see user risen questions about VF MTU, especially in virtualized environment. MTU is configured (either with syste= m utilities or with DPDK) and has no effect, embarrassing the users. I have no objections to update the generic rte_ethdev chapter, but it would require attention from other vendors as well. With best regards, Slava