From: "Pei, Andy" <andy.pei@intel.com>
To: David Marchand <david.marchand@redhat.com>,
"dev@dpdk.org" <dev@dpdk.org>
Cc: Maxime Coquelin <maxime.coquelin@redhat.com>,
"Xia, Chenbo" <chenbo.xia@intel.com>
Subject: RE: [PATCH] net/virtio: remove address width limit for modern devices
Date: Fri, 10 Mar 2023 06:10:07 +0000 [thread overview]
Message-ID: <DM5PR11MB1739A6D8E4062AA381A3F1CD8FBA9@DM5PR11MB1739.namprd11.prod.outlook.com> (raw)
In-Reply-To: <20230309143604.2354288-1-david.marchand@redhat.com>
HI
> -----Original Message-----
> From: David Marchand <david.marchand@redhat.com>
> Sent: Thursday, March 9, 2023 10:36 PM
> To: dev@dpdk.org
> Cc: Pei, Andy <andy.pei@intel.com>; Maxime Coquelin
> <maxime.coquelin@redhat.com>; Xia, Chenbo <Chenbo.Xia@intel.com>
> Subject: [PATCH] net/virtio: remove address width limit for modern devices
>
> Modern devices don't have the same limitation as legacy devices, because
> vring addresses are not configured using a 32-bit register.
>
> Signed-off-by: David Marchand <david.marchand@redhat.com>
> ---
> drivers/net/virtio/virtio_pci.c | 28 ++++++++--------------------
> 1 file changed, 8 insertions(+), 20 deletions(-)
>
> diff --git a/drivers/net/virtio/virtio_pci.c b/drivers/net/virtio/virtio_pci.c
> index 9cf4d760b4..29eb739b04 100644
> --- a/drivers/net/virtio/virtio_pci.c
> +++ b/drivers/net/virtio/virtio_pci.c
> @@ -33,22 +33,6 @@
>
> struct virtio_pci_internal virtio_pci_internal[RTE_MAX_ETHPORTS];
>
> -static inline int
> -check_vq_phys_addr_ok(struct virtqueue *vq) -{
> - /* Virtio PCI device VIRTIO_PCI_QUEUE_PF register is 32bit,
> - * and only accepts 32 bit page frame number.
> - * Check if the allocated physical memory exceeds 16TB.
> - */
> - if ((vq->vq_ring_mem + vq->vq_ring_size - 1) >>
> - (VIRTIO_PCI_QUEUE_ADDR_SHIFT + 32)) {
> - PMD_INIT_LOG(ERR, "vring address shouldn't be above
> 16TB!");
> - return 0;
> - }
> -
> - return 1;
> -}
> -
> #define PCI_MSIX_ENABLE 0x8000
>
> static enum virtio_msix_status
> @@ -273,8 +257,15 @@ legacy_setup_queue(struct virtio_hw *hw, struct
> virtqueue *vq) {
> uint32_t src;
>
> - if (!check_vq_phys_addr_ok(vq))
> + /* Virtio PCI device VIRTIO_PCI_QUEUE_PFN register is 32bit,
> + * and only accepts 32 bit page frame number.
> + * Check if the allocated physical memory exceeds 16TB.
> + */
> + if ((vq->vq_ring_mem + vq->vq_ring_size - 1) >>
> + (VIRTIO_PCI_QUEUE_ADDR_SHIFT + 32)) {
> + PMD_INIT_LOG(ERR, "vring address shouldn't be above
> 16TB!");
> return -1;
> + }
>
> rte_pci_ioport_write(VTPCI_IO(hw), &vq->vq_queue_index, 2,
> VIRTIO_PCI_QUEUE_SEL);
> @@ -476,9 +467,6 @@ modern_setup_queue(struct virtio_hw *hw, struct
> virtqueue *vq)
> uint64_t desc_addr, avail_addr, used_addr;
> uint16_t notify_off;
>
> - if (!check_vq_phys_addr_ok(vq))
> - return -1;
> -
> desc_addr = vq->vq_ring_mem;
> avail_addr = desc_addr + vq->vq_nentries * sizeof(struct vring_desc);
> used_addr = RTE_ALIGN_CEIL(avail_addr + offsetof(struct vring_avail,
> --
> 2.39.2
Acked-by: Andy Pei <andy.pei@intel.com>
next prev parent reply other threads:[~2023-03-10 6:10 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-09 14:36 David Marchand
2023-03-09 14:59 ` Maxime Coquelin
2023-03-09 15:08 ` David Marchand
2023-03-10 6:11 ` Pei, Andy
2023-03-10 6:10 ` Pei, Andy [this message]
2023-03-10 8:07 ` Xia, Chenbo
2023-03-14 8:53 ` [PATCH v2] " David Marchand
2023-03-16 14:46 ` Maxime Coquelin
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