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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM6PR11MB4252.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: cea5be84-762c-49dc-1d0a-08da4e9f3c41 X-MS-Exchange-CrossTenant-originalarrivaltime: 15 Jun 2022 07:18:24.3388 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: TYTGzR8JY4rdju3G0M2/TXJLZ+H8jZ4vqJFNreY7GY5K+RSaMx4DrnIp+OchBJHlEQyfMA2zD2zsEClW/TQNFA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW3PR11MB4665 X-OriginatorOrg: intel.com X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Hi Wei, > -----Original Message----- > From: Huang, Wei > Sent: Thursday, June 09, 2022 16:50 > To: dev@dpdk.org; thomas@monjalon.net; nipun.gupta@nxp.com; > hemant.agrawal@nxp.com > Cc: stable@dpdk.org; Xu, Rosen ; Zhang, Tianfei > ; Zhang, Qi Z ; Huang, Wei > > Subject: [PATCH v1] raw/ifpga: free file handle before function return >=20 > Coverity issue: 379064 > Fixes: 673c897f4d73 ("raw/ifpga: support OFS card probing") >=20 > Signed-off-by: Wei Huang > --- > drivers/raw/ifpga/base/ifpga_enumerate.c | 28 +++++++++++++++++++---- > ----- > 1 file changed, 19 insertions(+), 9 deletions(-) >=20 > diff --git a/drivers/raw/ifpga/base/ifpga_enumerate.c > b/drivers/raw/ifpga/base/ifpga_enumerate.c > index 7a5d264..61eb660 100644 > --- a/drivers/raw/ifpga/base/ifpga_enumerate.c > +++ b/drivers/raw/ifpga/base/ifpga_enumerate.c > @@ -837,8 +837,10 @@ static int find_dfls_by_vsec(struct > dfl_fpga_enum_info *info) > vndr_hdr =3D 0; > ret =3D pread(fd, &vndr_hdr, sizeof(vndr_hdr), > voff + PCI_VNDR_HEADER); > - if (ret < 0) > - return -EIO; > + if (ret < 0) { > + ret =3D -EIO; > + goto free_handle; > + } > if (PCI_VNDR_HEADER_ID(vndr_hdr) =3D=3D > PCI_VSEC_ID_INTEL_DFLS && > pci_data->vendor_id =3D=3D PCI_VENDOR_ID_INTEL) > break; > @@ -846,19 +848,23 @@ static int find_dfls_by_vsec(struct > dfl_fpga_enum_info *info) >=20 > if (!voff) { > dev_debug(hw, "%s no DFL VSEC found\n", __func__); > - return -ENODEV; > + ret =3D -ENODEV; > + goto free_handle; > } >=20 > dfl_cnt =3D 0; > ret =3D pread(fd, &dfl_cnt, sizeof(dfl_cnt), voff + > PCI_VNDR_DFLS_CNT); > - if (ret < 0) > - return -EIO; > + if (ret < 0) { > + ret =3D -EIO; > + goto free_handle; > + } >=20 > dfl_res_off =3D voff + PCI_VNDR_DFLS_RES; > if (dfl_res_off + (dfl_cnt * sizeof(u32)) > PCI_CFG_SPACE_EXP_SIZE) > { > dev_err(hw, "%s DFL VSEC too big for PCIe config space\n", > __func__); > - return -EINVAL; > + ret =3D -EINVAL; > + goto free_handle; > } >=20 > for (i =3D 0; i < dfl_cnt; i++, dfl_res_off +=3D sizeof(u32)) { @@ -868= ,7 > +874,8 @@ static int find_dfls_by_vsec(struct dfl_fpga_enum_info *info) > if (bir >=3D PCI_MAX_RESOURCE) { > dev_err(hw, "%s bad bir number %d\n", > __func__, bir); > - return -EINVAL; > + ret =3D -EINVAL; > + goto free_handle; > } >=20 > len =3D pci_data->region[bir].len; > @@ -876,7 +883,8 @@ static int find_dfls_by_vsec(struct > dfl_fpga_enum_info *info) > if (offset >=3D len) { > dev_err(hw, "%s bad offset %u >=3D %"PRIu64"\n", > __func__, offset, len); > - return -EINVAL; > + ret =3D -EINVAL; > + goto free_handle; > } >=20 > dev_debug(hw, "%s BAR %d offset 0x%x\n", __func__, bir, > offset); @@ -886,7 +894,9 @@ static int find_dfls_by_vsec(struct > dfl_fpga_enum_info *info) > dfl_fpga_enum_info_add_dfl(info, start, len, addr); > } >=20 > - return 0; > +free_handle: > + close(fd); > + return ret; > } >=20 > /* default method of finding dfls starting at offset 0 of bar 0 */ > -- > 1.8.3.1 It looks good for me. Reviewed-by: Rosen Xu