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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM6PR11MB4491.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: dee510d5-67a6-4bd1-f6ec-08d9ea1f8e2d X-MS-Exchange-CrossTenant-originalarrivaltime: 07 Feb 2022 09:52:29.8961 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: YESgxsmMG6G0M+lHvWgJiZVB9oySSMjxdZoRMtsvN5N1lLXJDIqXuiu1BqtPAdzkCEU/XTwDColyQaMNUBC2RkZAJmi1qvfiWvxtkv9Y7yE= X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL0PR11MB3506 X-OriginatorOrg: intel.com X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org > Enable Tx IPv4 checksum offload only when Tx inline crypto is needed. > In other cases such as Tx Inline protocol offload, checksum computation > is implicitly taken care by HW. Why is that? These is two separate HW offload and user has to enable each of them explic= itly. Also we can TX clear-text traffic. > The advantage of having only necessary > offloads enabled is that Tx burst function can be as light as possible. >=20 > Signed-off-by: Nithin Dabilpuram > --- > examples/ipsec-secgw/ipsec-secgw.c | 3 --- > examples/ipsec-secgw/sa.c | 9 +++++++++ > 2 files changed, 9 insertions(+), 3 deletions(-) >=20 > diff --git a/examples/ipsec-secgw/ipsec-secgw.c b/examples/ipsec-secgw/ip= sec-secgw.c > index 21abc0d..d8a9bfa 100644 > --- a/examples/ipsec-secgw/ipsec-secgw.c > +++ b/examples/ipsec-secgw/ipsec-secgw.c > @@ -2314,9 +2314,6 @@ port_init(uint16_t portid, uint64_t req_rx_offloads= , uint64_t req_tx_offloads) > local_port_conf.txmode.offloads |=3D > RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE; >=20 > - if (dev_info.tx_offload_capa & RTE_ETH_TX_OFFLOAD_IPV4_CKSUM) > - local_port_conf.txmode.offloads |=3D RTE_ETH_TX_OFFLOAD_IPV4_CKSUM; > - > printf("port %u configuring rx_offloads=3D0x%" PRIx64 > ", tx_offloads=3D0x%" PRIx64 "\n", > portid, local_port_conf.rxmode.offloads, > diff --git a/examples/ipsec-secgw/sa.c b/examples/ipsec-secgw/sa.c > index 1839ac7..b878a48 100644 > --- a/examples/ipsec-secgw/sa.c > +++ b/examples/ipsec-secgw/sa.c > @@ -1790,6 +1790,15 @@ sa_check_offloads(uint16_t port_id, uint64_t *rx_o= ffloads, > RTE_SECURITY_ACTION_TYPE_INLINE_PROTOCOL) > && rule->portid =3D=3D port_id) { > *tx_offloads |=3D RTE_ETH_TX_OFFLOAD_SECURITY; > + > + /* Checksum offload is not needed for inline protocol as > + * all processing for Outbound IPSec packets will be > + * implicitly taken care and for non-IPSec packets, > + * there is no need of IPv4 Checksum offload. > + */ > + if (rule_type =3D=3D RTE_SECURITY_ACTION_TYPE_INLINE_CRYPTO) > + *tx_offloads |=3D RTE_ETH_TX_OFFLOAD_IPV4_CKSUM; > + > if (rule->mss) > *tx_offloads |=3D RTE_ETH_TX_OFFLOAD_TCP_TSO; > } > -- > 2.8.4