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Thu, 15 Apr 2021 06:33:34 +0000 Received: from DM6PR12MB2748.namprd12.prod.outlook.com ([fe80::d011:3b55:aafb:9280]) by DM6PR12MB2748.namprd12.prod.outlook.com ([fe80::d011:3b55:aafb:9280%5]) with mapi id 15.20.4020.022; Thu, 15 Apr 2021 06:33:34 +0000 From: Raslan Darawsheh To: Ferruh Yigit , Ori Kam , "dev@dpdk.org" , "andrew.rybchenko@oktetlabs.ru" CC: "ivan.malov@oktetlabs.ru" , "ying.a.wang@intel.com" , "olivier.matz@6wind.com" , Slava Ovsiienko , Shiri Kuzin , "stable@dpdk.org" , David Marchand , NBU-Contact-Thomas Monjalon Thread-Topic: [PATCH v4 2/2] ethdev: update qfi definition Thread-Index: AQHXKv9N4K9KbNjqm0KGP0/dTN3cdqqyHJLggAAbDgCAAcJ2AIABMh4A Date: Thu, 15 Apr 2021 06:33:34 +0000 Message-ID: References: <20210330075036.6579-2-rasland@nvidia.com> <20210404074552.24190-1-rasland@nvidia.com> <20210404074552.24190-3-rasland@nvidia.com> <536631b9-c634-ddac-c154-91978ffc29a5@intel.com> <53c622e2-3a00-95aa-a639-f8d26f2bf8ba@intel.com> In-Reply-To: <53c622e2-3a00-95aa-a639-f8d26f2bf8ba@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: intel.com; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM6PR12MB2748.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 0f5a01c0-9b80-42ee-bf87-08d8ffd86527 X-MS-Exchange-CrossTenant-originalarrivaltime: 15 Apr 2021 06:33:34.6088 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: RlNMUsqrbE2I57vi1GmQhK0sXWbX4v/VhUsodBgf+/neQDu3vqk6ALjzT+8smIjyIw2yAhGvPtP6m5mw/pZf7Q== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB3260 Subject: Re: [dpdk-dev] [PATCH v4 2/2] ethdev: update qfi definition X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Kindest regards, Raslan Darawsheh > -----Original Message----- > From: Ferruh Yigit > Sent: Wednesday, April 14, 2021 3:17 PM > To: Ori Kam ; Raslan Darawsheh ; > dev@dpdk.org; andrew.rybchenko@oktetlabs.ru > Cc: ivan.malov@oktetlabs.ru; ying.a.wang@intel.com; > olivier.matz@6wind.com; Slava Ovsiienko ; Shiri > Kuzin ; stable@dpdk.org; David Marchand > ; NBU-Contact-Thomas Monjalon > > Subject: Re: [PATCH v4 2/2] ethdev: update qfi definition >=20 > On 4/13/2021 10:24 AM, Ori Kam wrote: > > Hi Raslan, > > > >> -----Original Message----- > >> From: Raslan Darawsheh > >> Subject: RE: [PATCH v4 2/2] ethdev: update qfi definition > >> > >> Hi, > >> > >>> -----Original Message----- > >>> From: Ferruh Yigit > >>> Sent: Tuesday, April 6, 2021 7:10 PM > >>> To: Raslan Darawsheh ; dev@dpdk.org; Ori Kam > >>> ; andrew.rybchenko@oktetlabs.ru > >>> Cc: ivan.malov@oktetlabs.ru; ying.a.wang@intel.com; > >>> olivier.matz@6wind.com; Slava Ovsiienko ; > Shiri > >>> Kuzin ; stable@dpdk.org; David Marchand > >>> ; NBU-Contact-Thomas Monjalon > >>> > >>> Subject: Re: [PATCH v4 2/2] ethdev: update qfi definition > >>> > >>> On 4/4/2021 8:45 AM, Raslan Darawsheh wrote: > >>>> qfi field is 8 bits which represent single bit for > >>>> PPP (paging Policy Presence) single bit for RQI > >>>> (Reflective QoS Indicator) and 6 bits for qfi > >>>> (QoS Flow Identifier) based on RFC 38415-g30 > >>>> > >>>> This update the doxygen format and the mask for qfi > >>>> to properly identify the full 8 bits of the field. > >>>> > >>>> note: changing the default mask would cause different > >>>> patterns generated by testpmd. > >>>> > >>>> Fixes: 346553db5bd1 ("ethdev: add GTP extension header to flow API") > >>>> Cc: ying.a.wang@intel.com > >>>> Cc: stable@dpdk.org > >>>> > >>>> Signed-off-by: Raslan Darawsheh > >>>> --- > >>>> doc/guides/testpmd_app_ug/testpmd_funcs.rst | 3 ++- > >>>> lib/librte_ethdev/rte_flow.h | 20 ++++++++++++++++= +--- > >>>> 2 files changed, 19 insertions(+), 4 deletions(-) > >>>> > >>>> diff --git a/doc/guides/testpmd_app_ug/testpmd_funcs.rst > >>> b/doc/guides/testpmd_app_ug/testpmd_funcs.rst > >>>> index f59eb8a27d..dd39c4c3c2 100644 > >>>> --- a/doc/guides/testpmd_app_ug/testpmd_funcs.rst > >>>> +++ b/doc/guides/testpmd_app_ug/testpmd_funcs.rst > >>>> @@ -3742,7 +3742,8 @@ This section lists supported pattern items and > >>> their attributes, if any. > >>>> - ``gtp_psc``: match GTP PDU extension header with type 0x85. > >>>> > >>>> - ``pdu_type {unsigned}``: PDU type. > >>>> - - ``qfi {unsigned}``: QoS flow identifier. > >>>> + > >>>> + - ``qfi {unsigned}``: PPP, RQI and QoS flow identifier. > >>>> > >>>> - ``pppoes``, ``pppoed``: match PPPoE header. > >>>> > >>>> diff --git a/lib/librte_ethdev/rte_flow.h b/lib/librte_ethdev/rte_fl= ow.h > >>>> index 6cc57136ac..20b4389429 100644 > >>>> --- a/lib/librte_ethdev/rte_flow.h > >>>> +++ b/lib/librte_ethdev/rte_flow.h > >>>> @@ -20,6 +20,7 @@ > >>>> #include > >>>> #include > >>>> #include > >>>> +#include > >>>> #include > >>>> #include > >>>> #include > >>>> @@ -1421,16 +1422,29 @@ static const struct rte_flow_item_meta > >>> rte_flow_item_meta_mask =3D { > >>>> * > >>>> * Matches a GTP PDU extension header with type 0x85. > >>>> */ > >>>> +RTE_STD_C11 > >>>> struct rte_flow_item_gtp_psc { > >>>> - uint8_t pdu_type; /**< PDU type. */ > >>>> - uint8_t qfi; /**< QoS flow identifier. */ > >>>> + union { > >>>> + struct { > >>>> + /* > >>>> + * These fields are retained for compatibility. > >>>> + * Please switch to the new header field below. > >>>> + */ > >>>> + uint8_t pdu_type; /**< PDU type. */ > >>>> + uint8_t qfi; /**< PPP, RQI, QoS flow identifier. */ > >>>> + > >>>> + }; > >>>> + struct rte_gtp_psc_hdr hdr; > >>>> + }; > >>>> }; > >>> > >>> This will change the struct size even with union, since old version i= s > missing > >>> all fields from protocol header. Struct size will go from 2 --> 5 byt= es [1]. > >>> > >>> Since this is public struct, we can't change its size. > >>> > >>> @Ori, Andrew, > >>> > >>> Do you have a suggestion for next step? > >>> > > > > I think Ferruh is right, and I think that we should at this point just = update > the documentation. > > Sorry for the detour > > Just small comment about the original patch. > > I don't think you should change the default mask since it may break exi= sting > apps. > > >=20 > I will continue with first patch [1], and will update the protocol refere= nce in > the commit log. >=20 > Meanwhile adding 'struct rte_gtp_psc_hdr' (patch v4 1/2) work can continu= e > separately. > And when it is added we can send a deprecation notice to update 'struct > rte_flow_item_gtp_psc' and finally update it on v21.11 to have 'struct > rte_gtp_psc_hdr' in it. Makes sense? >=20 Yes, makes sense to me,=20 I'll work in the meanwhile on providing the new hdrs definition . > [1] > https://patches.dpdk.org/project/dpdk/patch/20210323121134.19113-1- > rasland@nvidia.com/ >=20 > >>> - We can still add the "struct rte_gtp_psc_hdr", and add a deprecatio= n > notice > >>> for "struct rte_flow_item_gtp_psc" to say it will use "struct > >>> rte_gtp_psc_hdr" > >>> on 21.11. > >>> > >>> - And for this release use the Raslan's first version: > >>> - uint8_t qfi; /**< QoS flow identifier. */ > >>> + uint8_t qfi; /**< PPP, RQI, QoS flow identifier. */ > >>> > >>> > >>> Does it make sense? Any comments? > >>> > >> @Ori Kam, @andrew.rybchenko@oktetlabs.ru, > >> This is a kind remainder of this patch, > >> > >>> > >>> > >>> [1] > >>> struct rte_gtp_psc_hdr { > >>> uint8_t ext_hdr_len; /* 0 = 1 */ > >>> uint8_t type:4; /* 1: = 0 1 */ > >>> uint8_t qmp:1; /* 1: = 4 1 */ > >>> > >>> /* XXX 3 bits hole, try to pack */ > >>> > >>> union { > >>> struct { > >>> uint8_t snp:1; /* 2: = 0 1 */ > >>> uint8_t spare_dl1:2; /* 2: = 1 1 */ > >>> }; /* 2 = 1 */ > >>> struct { > >>> uint8_t dl_delay_ind:1; /* 2: = 0 1 */ > >>> uint8_t ul_delay_ind:1; /* 2: = 1 1 */ > >>> uint8_t snp_ul1:1; /* 2: = 2 1 */ > >>> }; /* 2 = 1 */ > >>> }; /* 2 = 1 */ > >>> union { > >>> struct { > >>> uint8_t ppp:1; /* 3: = 0 1 */ > >>> uint8_t rqi:1; /* 3: = 1 1 */ > >>> }; /* 3 = 1 */ > >>> struct { > >>> uint8_t n_delay_ind:1; /* 3: = 0 1 */ > >>> uint8_t spare_ul2:1; /* 3: = 1 1 */ > >>> }; /* 3 = 1 */ > >>> }; /* 3 = 1 */ > >>> uint8_t qfi:6; /* 4: = 0 1 */ > >>> > >>> /* XXX 2 bits hole, try to pack */ > >>> > >>> uint8_t data[]; /* 5 = 0 */ > >>> > >>> /* size: 5, cachelines: 1, members: 7 */ > >>> /* sum members: 3 */ > >>> /* sum bitfield members: 11 bits, bit holes: 2, sum bit hol= es: 5 bits > */ > >>> /* last cacheline: 5 bytes */ > >>> }; > >>> > >>>> > >>>> /** Default mask for RTE_FLOW_ITEM_TYPE_GTP_PSC. */ > >>>> #ifndef __cplusplus > >>>> static const struct rte_flow_item_gtp_psc > >>>> rte_flow_item_gtp_psc_mask =3D { > >>>> - .qfi =3D 0x3f, > >>>> + .hdr.ppp =3D 1, > >>>> + .hdr.rqi =3D 1, > >>>> + .hdr.qfi =3D 0x3f, > >>>> }; > >>>> #endif > >>>> > >>>> > >