From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 068AFA04BA; Thu, 1 Oct 2020 15:28:40 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 83EDB1DB62; Thu, 1 Oct 2020 15:28:38 +0200 (CEST) Received: from hqnvemgate26.nvidia.com (hqnvemgate26.nvidia.com [216.228.121.65]) by dpdk.org (Postfix) with ESMTP id 670CE1DB60; Thu, 1 Oct 2020 15:28:36 +0200 (CEST) Received: from hqmail.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate26.nvidia.com (using TLS: TLSv1.2, AES256-SHA) id ; Thu, 01 Oct 2020 06:28:22 -0700 Received: from HQMAIL107.nvidia.com (172.20.187.13) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Thu, 1 Oct 2020 13:28:35 +0000 Received: from NAM10-DM6-obe.outbound.protection.outlook.com (104.47.58.108) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Thu, 1 Oct 2020 13:28:35 +0000 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=W7bi01Z599+OCRPMV35qJjtVPDB1fvz7Sp5sqAlGZ26f8pwIEaXAwooZXO20cMzP92b4eyBcUu67Qr0VpHgqdcpSMzNdhww7JUVd1k0tpTaqCwwd03QbsCM+ua3ZLU10Me5m8HtEbqyJLjcQ7vpDMxkdltkwUhBXOwB5ScgkwymdDpkl5IXkoSlFQyBHQUeAZVVJtFCp5YU8wX/Ck0vyZcqsV7noLAd/1dbIxa6vvQUUHASbkpT7KM5sQRfP/NHZ/+7IWegy5v2nZbL9Avp4yvKwLa/qu0vGL79ZIgzBZsyavAI1No2gOL3br1noLiDV+S52j7mtObsky/hYOgXpjw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=KLMnah+WQxbAaDyYsVGMuoJHqNhSh6A2t9j3jorgjbs=; b=j0YcCPWs/tmVcMXsKjI6FfrJKk6tgsN7zBXJcIQv8I4VaZwLL1PyKQTWRejYHsjJ2AS4/BF9yPeB49B7vQZBN8dFiixu1yRm2oZlVjconSxPRXfv54KtLWIGXG3ETBFdlycuxt/BUwDeinjQuooc+B7LvYXqDjxUAu7XujRXPIrm62n2Yw/uI0iSZwBwwqTYCHoxwrCa2uhiGdFABCovw2yfdhpfFITM05gw+3uBLaMMYcxdpaWcGzMM9EDbKtqLVEu44qAp3J+E5oZVeuvdpMxyLUaGMbPjeYtKs7FzUg4unyLR08jeh9ybbAK72n/j1ZgGDreklZI/vvOF9UlLWg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nvidia.com; dmarc=pass action=none header.from=nvidia.com; dkim=pass header.d=nvidia.com; arc=none Received: from DM6PR12MB2748.namprd12.prod.outlook.com (2603:10b6:5:43::28) by DM6PR12MB2969.namprd12.prod.outlook.com (2603:10b6:5:115::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3412.26; Thu, 1 Oct 2020 13:28:34 +0000 Received: from DM6PR12MB2748.namprd12.prod.outlook.com ([fe80::f506:4af8:281b:cdeb]) by DM6PR12MB2748.namprd12.prod.outlook.com ([fe80::f506:4af8:281b:cdeb%7]) with mapi id 15.20.3412.029; Thu, 1 Oct 2020 13:28:34 +0000 From: Raslan Darawsheh To: Alexander Kozyrev , "dev@dpdk.org" CC: "stable@dpdk.org" , Slava Ovsiienko Thread-Topic: [PATCH] net/mlx5: fix Rx queue count calculation Thread-Index: AQHWlo98cKEXESg9FUG02Er5qniSkamCwFPw Date: Thu, 1 Oct 2020 13:28:34 +0000 Message-ID: References: <20200929183623.22685-1-akozyrev@nvidia.com> In-Reply-To: <20200929183623.22685-1-akozyrev@nvidia.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: nvidia.com; dkim=none (message not signed) header.d=none;nvidia.com; dmarc=none action=none header.from=nvidia.com; x-originating-ip: [212.29.221.74] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: aac839da-904c-441e-8464-08d8660de570 x-ms-traffictypediagnostic: DM6PR12MB2969: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:4502; x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: XKnDu3e2930MU0njYhk+zKEKwwW786CCIlZrha4GOD0Bq7QYMI7fTEjaa4KoxIvZ8nCEoNHie0hcC2VTeFwRo6zG4Q3ltK6Ok6iht9antK3Yd666mytAKvTuUFZ8ZFBTOkL7QFXR+fs3KUwdYVdKSN2zgxRGNzeYxay93S9+ZwMEos2/1rZiqdUEy2xsx3TZTznp7ijlh/uE8Ve358ceREnqS5LpxX+EGAgJfzFHsoiIOjUVdFLtX9MOPOm8pMZvU9CA1seXsxaglEOaUcEFAzyC9KZp0bYl75gi4IVqPYaSI7mvgUIn7Ni9s0eEuROdxwD/gnlNqPzG2cU6AoeRWuhXdlRXZyDHBr7QmGsE56aMW4xprIkQOThAhpQOiaQB x-forefront-antispam-report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:DM6PR12MB2748.namprd12.prod.outlook.com; PTR:; CAT:NONE; SFS:(4636009)(366004)(376002)(346002)(136003)(39860400002)(396003)(186003)(55016002)(107886003)(8936002)(5660300002)(4326008)(66556008)(83380400001)(450100002)(86362001)(9686003)(76116006)(2906002)(64756008)(66446008)(26005)(53546011)(66476007)(54906003)(52536014)(71200400001)(6506007)(8676002)(316002)(66946007)(478600001)(33656002)(7696005)(110136005); DIR:OUT; SFP:1101; x-ms-exchange-antispam-messagedata: yvyRkfP/lBFUy/xYysxAOwNNPFkPvtE4D+yxdW7l138k/rEoAAqvQlAgrDPrccOP/QOEvr+bSpnr8yR6uON9CMAkooPBlNY6s0ov3vowqNvonX0TBJ4dHZDc6K1cWuX77WB7cNR8LbLHoDVJYmHZlksNW68I/VoJxpxSeNRCE6N4D4yDfkiaSSb5qTaxiJoJtbiBSsvcKvYPdBewfJn1D/Ub+rlkE5Oyrr6UixZ1sJqCl1lnjAr8jrHrtNIPRiEDx1rtMZxVYSl01IyfE3ZbZV/Kl1Xd7+B/+9gT6SbkV+tGxSXYuxDtvr2LP/GyzEngHwvXWpOq3Kbvk8/QrBQM2MKnbH2+sfIgzu2ExZG6GlQcsog9cpL1COOxmPBKP1KxJ9Al0sdvDzqkgSAA2fZBhdrwEEt1AFkr5wxgJvc7LuCK1Pcp+W/m1yoghJdd8+jjdrP3IvmbJ6wUZPrYwQy6opiwEdB/0v7kX996osL1/KdikWpkwbaK/NotKY40r9U+O/ydcyTm3z+ZY7cJ7OJ/ZPUNbNslQnwjRxmyXPcNlAgxVRZAXBIlr0F3hMouMnmULsvbzHZlCAcRAJ8V3UPFUlGTj0dSTETPjE3eXQp8mZy56I8ku6EzW/zlNLRr5RTbdD2eRosv/pwT1D09rh/6ag== Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM6PR12MB2748.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: aac839da-904c-441e-8464-08d8660de570 X-MS-Exchange-CrossTenant-originalarrivaltime: 01 Oct 2020 13:28:34.1820 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: fsB29i0FJHkMke+u4Fq2Q2ZERi7p1eHRSKeFIoR8Q8BSpvmEc9BkUo0eiFGB6+NQV/r8OtT96kyL4xURU5EusA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB2969 X-OriginatorOrg: Nvidia.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1601558903; bh=KLMnah+WQxbAaDyYsVGMuoJHqNhSh6A2t9j3jorgjbs=; h=ARC-Seal:ARC-Message-Signature:ARC-Authentication-Results:From:To: CC:Subject:Thread-Topic:Thread-Index:Date:Message-ID:References: In-Reply-To:Accept-Language:Content-Language:X-MS-Has-Attach: X-MS-TNEF-Correlator:authentication-results:x-originating-ip: x-ms-publictraffictype:x-ms-office365-filtering-correlation-id: x-ms-traffictypediagnostic:x-ms-exchange-transport-forked: x-microsoft-antispam-prvs:x-ms-oob-tlc-oobclassifiers: x-ms-exchange-senderadcheck:x-microsoft-antispam: x-microsoft-antispam-message-info:x-forefront-antispam-report: x-ms-exchange-antispam-messagedata:Content-Type: Content-Transfer-Encoding:MIME-Version: X-MS-Exchange-CrossTenant-AuthAs: X-MS-Exchange-CrossTenant-AuthSource: X-MS-Exchange-CrossTenant-Network-Message-Id: X-MS-Exchange-CrossTenant-originalarrivaltime: X-MS-Exchange-CrossTenant-fromentityheader: X-MS-Exchange-CrossTenant-id:X-MS-Exchange-CrossTenant-mailboxtype: X-MS-Exchange-CrossTenant-userprincipalname: X-MS-Exchange-Transport-CrossTenantHeadersStamped:X-OriginatorOrg; b=hNYXWrdXNgzSkoD5kTPsRZJWzxIS1yKMDw1a3pEe1C+oauiwab/Az0wDf7o9EK8tO Ry8PRVc//bP7Yebf8bQwHwlVPEuDGqBUuvA6/xfdQqXB95QiUF5PVAmZqQO5uU/RQX ydrypx576S3A6D0DeTNPvnYUFBgBrh1YFeYw7evbVqRJospDB1EcsjFtX7BlMs1luq F1fV84Wqh0c6WQsYmqK5+vuHh0DcM34CMneqqGPBGGuYUitRKoT+iI/WM5ggZ5vmCT YbZ58p6Yg9xTmg+YewNGwSqd0CMLBouELbapm2xPAJ1OJEu21ikcJpm0p7ePX1w0sY Zmpog5Em06+og== Subject: Re: [dpdk-dev] [PATCH] net/mlx5: fix Rx queue count calculation X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi, > -----Original Message----- > From: Alexander Kozyrev > Sent: Tuesday, September 29, 2020 9:36 PM > To: dev@dpdk.org > Cc: stable@dpdk.org; Raslan Darawsheh ; Slava > Ovsiienko > Subject: [PATCH] net/mlx5: fix Rx queue count calculation >=20 > There are a few discrepancies in the Rx queue count calculation. >=20 > The wrong index is used to calculate the number of used descriptors > in an Rx queue in case of the compressed CQE processing. The global > CQ index is used while we really need an internal index in a single > compressed session to get the right number of elements processed. >=20 > The total number of CQs should be used instead of the number of mbufs > to find out about the maximum number of Rx descriptors. These numbers > are not equal for the Multi-Packet Rx queue. >=20 > Allow the Rx queue count calculation for all possible Rx bursts since > CQ handling is the same for regular, vectorized, and multi-packet Rx > queues. >=20 > Fixes: 26f0488344 ("net/mlx5: support Rx queue count API") > Cc: stable@dpdk.org >=20 > Signed-off-by: Alexander Kozyrev > Acked-by: Viacheslav Ovsiienko > --- > drivers/net/mlx5/mlx5_rxtx.c | 27 ++++++++++++--------------- > 1 file changed, 12 insertions(+), 15 deletions(-) >=20 > diff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c > index 101555ed03..4755980d5b 100644 > --- a/drivers/net/mlx5/mlx5_rxtx.c > +++ b/drivers/net/mlx5/mlx5_rxtx.c > @@ -465,19 +465,11 @@ rx_queue_count(struct mlx5_rxq_data *rxq) > { > struct rxq_zip *zip =3D &rxq->zip; > volatile struct mlx5_cqe *cqe; > + unsigned int cq_ci =3D rxq->cq_ci; > const unsigned int cqe_n =3D (1 << rxq->cqe_n); > const unsigned int cqe_cnt =3D cqe_n - 1; > - unsigned int cq_ci; > - unsigned int used; > + unsigned int used =3D 0; >=20 > - /* if we are processing a compressed cqe */ > - if (zip->ai) { > - used =3D zip->cqe_cnt - zip->ca; > - cq_ci =3D zip->cq_ci; > - } else { > - used =3D 0; > - cq_ci =3D rxq->cq_ci; > - } > cqe =3D &(*rxq->cqes)[cq_ci & cqe_cnt]; > while (check_cqe(cqe, cqe_n, cq_ci) !=3D > MLX5_CQE_STATUS_HW_OWN) { > int8_t op_own; > @@ -485,14 +477,17 @@ rx_queue_count(struct mlx5_rxq_data *rxq) >=20 > op_own =3D cqe->op_own; > if (MLX5_CQE_FORMAT(op_own) =3D=3D MLX5_COMPRESSED) > - n =3D rte_be_to_cpu_32(cqe->byte_cnt); > + if (unlikely(zip->ai)) > + n =3D zip->cqe_cnt - zip->ai; > + else > + n =3D rte_be_to_cpu_32(cqe->byte_cnt); > else > n =3D 1; > cq_ci +=3D n; > used +=3D n; > cqe =3D &(*rxq->cqes)[cq_ci & cqe_cnt]; > } > - used =3D RTE_MIN(used, (1U << rxq->elts_n) - 1); > + used =3D RTE_MIN(used, cqe_n); > return used; > } >=20 > @@ -515,11 +510,12 @@ mlx5_rx_descriptor_status(void *rx_queue, > uint16_t offset) > container_of(rxq, struct mlx5_rxq_ctrl, rxq); > struct rte_eth_dev *dev =3D ETH_DEV(rxq_ctrl->priv); >=20 > - if (dev->rx_pkt_burst !=3D mlx5_rx_burst) { > + if (dev->rx_pkt_burst =3D=3D NULL || > + dev->rx_pkt_burst =3D=3D removed_rx_burst) { > rte_errno =3D ENOTSUP; > return -rte_errno; > } > - if (offset >=3D (1 << rxq->elts_n)) { > + if (offset >=3D (1 << rxq->cqe_n)) { > rte_errno =3D EINVAL; > return -rte_errno; > } > @@ -630,7 +626,8 @@ mlx5_rx_queue_count(struct rte_eth_dev *dev, > uint16_t rx_queue_id) > struct mlx5_priv *priv =3D dev->data->dev_private; > struct mlx5_rxq_data *rxq; >=20 > - if (dev->rx_pkt_burst !=3D mlx5_rx_burst) { > + if (dev->rx_pkt_burst =3D=3D NULL || > + dev->rx_pkt_burst =3D=3D removed_rx_burst) { > rte_errno =3D ENOTSUP; > return -rte_errno; > } > -- > 2.24.1 Patch applied to next-net-mlx, Kindest regards, Raslan Darawsheh