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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM6PR12MB3628.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: af04fefe-2798-4852-2ed2-08d8711ed78c X-MS-Exchange-CrossTenant-originalarrivaltime: 15 Oct 2020 15:27:34.9972 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 2H1yQfnWy68lCAHM1lA/cLYtkTzbaBkqrx9ygNvmSKcxha5UWqckuAgZoV2XMmajXomLJ9XSx579ULeTOUMcKQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB2873 Subject: Re: [dpdk-dev] [PATCH v7 04/18] net/axgbe: add checks for max SIMD bitwidth X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" -----Original Message----- From: Ciara Power =20 Sent: Thursday, October 15, 2020 8:53 PM To: dev@dpdk.org Cc: viktorin@rehivetech.com; ruifeng.wang@arm.com; jerinj@marvell.com; drc@= linux.vnet.ibm.com; bruce.richardson@intel.com; konstantin.ananyev@intel.co= m; david.marchand@redhat.com; Ciara Power ; Somalapu= ram, Amaranath Subject: [PATCH v7 04/18] net/axgbe: add checks for max SIMD bitwidth [CAUTION: External Email] When choosing a vector path to take, an extra condition must be satisfied t= o ensure the max SIMD bitwidth allows for the CPU enabled path. Cc: Somalapuram Amaranath Signed-off-by: Ciara Power Acked-by: Amaranath Somalapuram --- v4: Updated enum name. --- drivers/net/axgbe/axgbe_rxtx.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/axgbe/axgbe_rxtx.c b/drivers/net/axgbe/axgbe_rxtx.= c index bc93becaa5..5386bd86f8 100644 --- a/drivers/net/axgbe/axgbe_rxtx.c +++ b/drivers/net/axgbe/axgbe_rxtx.c @@ -557,7 +557,8 @@ int axgbe_dev_tx_queue_setup(struct rte_eth_dev *dev, u= int16_t queue_idx, if (!pdata->tx_queues) pdata->tx_queues =3D dev->data->tx_queues; - if (txq->vector_disable) + if (txq->vector_disable || rte_get_max_simd_bitwidth() + < RTE_SIMD_128) dev->tx_pkt_burst =3D &axgbe_xmit_pkts; else #ifdef RTE_ARCH_X86 -- 2.22.0 Acked-by: Amaranath Somalapuram