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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM6PR12MB3753.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: d3f97b2c-5d27-4b53-ed65-08d8ee1960d0 X-MS-Exchange-CrossTenant-originalarrivaltime: 23 Mar 2021 16:33:23.7344 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: Mv0uiysw764BYGdLwZ0VyO5ELlyHAlY9YyNCXk07SwKhTbTDq/caUPC96x1YoSEIAO4ce4OyWeXmCgkh7GAuYQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR12MB1226 Subject: Re: [dpdk-dev] [PATCH] net/mlx5: add Rx checksum offload flag return bad X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi, Jiawei > -----Original Message----- > From: Jiawei Zhu <17826875952@163.com> > Sent: Monday, March 22, 2021 17:46 > To: dev@dpdk.org > Cc: zhujiawei12@huawei.com; Matan Azrad ; Shahaf > Shuler ; Slava Ovsiienko > Subject: [PATCH] net/mlx5: add Rx checksum offload flag return bad >=20 > From: Jiawei Zhu >=20 > When open the rx checksum offload and receive the wrong checksum, add > the ol_flags return bad. And it's not best to use multiplication and divi= sion > here. I'm sorry, there should be no any multiplications and divisions - the argum= ents are constants (can be determined at compilation time) and ara power of 2, hence compiler engages simple shifts. For example (I did rxq_cq_to_ol_flags= not inline to get the listing for x86-64): 29 rxq_cq_to_ol_flags: 21 /* 22 * An architecture-optimized byte swap for a 16-bit valu= e. 23 * 24 * Do not use this function directly. The preferred func= tion is rte_bswap16(). 25 */ 26 static inline uint16_t rte_arch_bswap16(uint16_t _x) 27 { 28 uint16_t x =3D _x; 29 0034 86D6 asm volatile ("xchgb %b[x1],%h[x2]" 30 : [x1] "=3DQ" (x) 37 =09 38 0036 89D0 movl %edx,%eax 39 0038 6681E200 andw $512,%dx 39 02 40 003d 66250004 andw $1024,%ax 41 0041 0FB7D2 movzwl %dx,%edx 42 0044 0FB7C0 movzwl %ax,%eax 43 0047 48C1EA02 shrq $2,%rdx 44 004b 48C1E802 shrq $2,%rax 45 004f 09D0 orl %edx,%eax 46 0051 C3 ret As we can see - there is no any mul/div and no any branches, that improves the performance. >=20 > Signed-off-by: Jiawei Zhu > --- > drivers/net/mlx5/mlx5_rxtx.c | 17 ++++++++++------- > drivers/net/mlx5/mlx5_utils.h | 6 ------ > 2 files changed, 10 insertions(+), 13 deletions(-) >=20 > diff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c > index e3ce9fd..9233af8 100644 > --- a/drivers/net/mlx5/mlx5_rxtx.c > +++ b/drivers/net/mlx5/mlx5_rxtx.c > @@ -1325,13 +1325,16 @@ enum mlx5_txcmp_code { > uint32_t ol_flags =3D 0; > uint16_t flags =3D rte_be_to_cpu_16(cqe->hdr_type_etc); >=20 > - ol_flags =3D > - TRANSPOSE(flags, > - MLX5_CQE_RX_L3_HDR_VALID, > - PKT_RX_IP_CKSUM_GOOD) | > - TRANSPOSE(flags, > - MLX5_CQE_RX_L4_HDR_VALID, > - PKT_RX_L4_CKSUM_GOOD); > + if (flags & MLX5_CQE_RX_L3_HDR_VALID) > + ol_flags |=3D PKT_RX_IP_CKSUM_GOOD; > + else > + ol_flags |=3D PKT_RX_IP_CKSUM_BAD; > + If MLX5_CQE_RX_L3_HDR_VALID is not set - it does not always mean the sum is= bad. If might happen if HW just did not recognize the packet format (for example= , for some tunnels) With best regards, Slava > + if (flags & MLX5_CQE_RX_L4_HDR_VALID) > + ol_flags |=3D PKT_RX_IP_CKSUM_GOOD; > + else > + ol_flags |=3D PKT_RX_IP_CKSUM_BAD; > + > return ol_flags; > } >=20 > diff --git a/drivers/net/mlx5/mlx5_utils.h b/drivers/net/mlx5/mlx5_utils.= h > index 7a62187..2f71a23 100644 > --- a/drivers/net/mlx5/mlx5_utils.h > +++ b/drivers/net/mlx5/mlx5_utils.h > @@ -44,12 +44,6 @@ > #define NB_SEGS(m) ((m)->nb_segs) > #define PORT(m) ((m)->port) >=20 > -/* Transpose flags. Useful to convert IBV to DPDK flags. */ -#define > TRANSPOSE(val, from, to) \ > - (((from) >=3D (to)) ? \ > - (((val) & (from)) / ((from) / (to))) : \ > - (((val) & (from)) * ((to) / (from)))) > - > /* > * For the case which data is linked with sequence increased index, the > * array table will be more efficiect than hash table once need to serar= ch > -- > 1.8.3.1 >=20