From: Slava Ovsiienko <viacheslavo@nvidia.com>
To: Dmitry Kozlyuk <dkozlyuk@nvidia.com>, "dev@dpdk.org" <dev@dpdk.org>
Cc: Matan Azrad <matan@nvidia.com>, Raslan Darawsheh <rasland@nvidia.com>
Subject: RE: [PATCH] common/mlx5: fix MPRQ mempool registration
Date: Tue, 16 Nov 2021 09:01:54 +0000 [thread overview]
Message-ID: <DM6PR12MB3753B499F7590CCD555F64F0DF999@DM6PR12MB3753.namprd12.prod.outlook.com> (raw)
In-Reply-To: <20211116085752.2419240-1-dkozlyuk@nvidia.com>
> -----Original Message-----
> From: Dmitry Kozlyuk <dkozlyuk@nvidia.com>
> Sent: Tuesday, November 16, 2021 10:58
> To: dev@dpdk.org
> Cc: Matan Azrad <matan@nvidia.com>; Raslan Darawsheh
> <rasland@nvidia.com>; Slava Ovsiienko <viacheslavo@nvidia.com>
> Subject: [PATCH] common/mlx5: fix MPRQ mempool registration
>
> Mempool registration code had a wrong assumption that it is always dealing
> with packet mempools and always called rte_pktmbuf_priv_flags(), which
> returned a random value for different types of mempools.
> In particular, it could consider MPRQ mempools as having externally pinned
> buffers, which is wrong.
> Packet mempools cannot be reliably recognized, but it is sufficient to check
> that the mempool is not a packet one, so it cannot have externally pinned
> buffers.
> Compare mempool private data size to that of packet mempools to check.
>
> Fixes: 690b2a88c2f7 ("common/mlx5: add mempool registration facilities")
> Fixes: fec28ca0e3a9 ("net/mlx5: support mempool registration")
>
> Signed-off-by: Dmitry Kozlyuk <dkozlyuk@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
next prev parent reply other threads:[~2021-11-16 9:01 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-16 8:57 Dmitry Kozlyuk
2021-11-16 9:01 ` Slava Ovsiienko [this message]
2021-11-16 11:55 ` [PATCH v2] " Dmitry Kozlyuk
2021-11-16 16:04 ` Raslan Darawsheh
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