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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM6PR12MB4987.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 9de07949-1f23-4cbd-e7f0-08d8f2951852 X-MS-Exchange-CrossTenant-originalarrivaltime: 29 Mar 2021 09:29:04.3651 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: XOUFgESRutHlmisuy1d8NHfjVK5kE4FOHUwqT//NdaJPUaxqTY2VBTNCQ5u8Cvg3TfobcFsOskmtoHjB2g8evQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB3372 Subject: Re: [dpdk-dev] [PATCH v2 1/4] common/mlx5: add user memory registration bits X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi, > -----Original Message----- > From: Suanming Mou > This commit adds the UMR capability bits. >=20 > Signed-off-by: Suanming Mou > --- > drivers/common/mlx5/linux/meson.build | 2 ++ > drivers/common/mlx5/mlx5_devx_cmds.c | 5 +++++ > drivers/common/mlx5/mlx5_devx_cmds.h | 3 +++ > 3 files changed, 10 insertions(+) >=20 > diff --git a/drivers/common/mlx5/linux/meson.build > b/drivers/common/mlx5/linux/meson.build > index 220de35420..5d6a861689 100644 > --- a/drivers/common/mlx5/linux/meson.build > +++ b/drivers/common/mlx5/linux/meson.build > @@ -186,6 +186,8 @@ has_sym_args =3D [ > 'mlx5dv_dr_action_create_aso' ], > [ 'HAVE_INFINIBAND_VERBS_H', 'infiniband/verbs.h', > 'INFINIBAND_VERBS_H' ], > + [ 'HAVE_MLX5_UMR_IMKEY', 'infiniband/mlx5dv.h', > + 'MLX5_WQE_UMR_CTRL_FLAG_INLINE' ], > ] > config =3D configuration_data() > foreach arg:has_sym_args > diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c > b/drivers/common/mlx5/mlx5_devx_cmds.c > index c90e020643..268bcd0d99 100644 > --- a/drivers/common/mlx5/mlx5_devx_cmds.c > +++ b/drivers/common/mlx5/mlx5_devx_cmds.c > @@ -266,6 +266,7 @@ mlx5_devx_cmd_mkey_create(void *ctx, > MLX5_SET(mkc, mkc, qpn, 0xffffff); > MLX5_SET(mkc, mkc, pd, attr->pd); > MLX5_SET(mkc, mkc, mkey_7_0, attr->umem_id & 0xFF); > + MLX5_SET(mkc, mkc, umr_en, attr->umr_en); > MLX5_SET(mkc, mkc, translations_octword_size, translation_size); > MLX5_SET(mkc, mkc, relaxed_ordering_write, > attr->relaxed_ordering_write); > @@ -752,6 +753,10 @@ mlx5_devx_cmd_query_hca_attr(void *ctx, > mini_cqe_resp_flow_tag); > attr->mini_cqe_resp_l3_l4_tag =3D MLX5_GET(cmd_hca_cap, hcattr, > mini_cqe_resp_l3_l4_tag); > + attr->umr_indirect_mkey_disabled =3D > + MLX5_GET(cmd_hca_cap, hcattr, > umr_indirect_mkey_disabled); > + attr->umr_modify_entity_size_disabled =3D > + MLX5_GET(cmd_hca_cap, hcattr, > umr_modify_entity_size_disabled); > if (attr->qos.sup) { > MLX5_SET(query_hca_cap_in, in, op_mod, > MLX5_GET_HCA_CAP_OP_MOD_QOS_CAP | > diff --git a/drivers/common/mlx5/mlx5_devx_cmds.h > b/drivers/common/mlx5/mlx5_devx_cmds.h > index 2826c0b2c6..67b5f771c6 100644 > --- a/drivers/common/mlx5/mlx5_devx_cmds.h > +++ b/drivers/common/mlx5/mlx5_devx_cmds.h > @@ -31,6 +31,7 @@ struct mlx5_devx_mkey_attr { > uint32_t pg_access:1; > uint32_t relaxed_ordering_write:1; > uint32_t relaxed_ordering_read:1; > + uint32_t umr_en:1; > struct mlx5_klm *klm_array; > int klm_num; > }; > @@ -151,6 +152,8 @@ struct mlx5_hca_attr { > uint32_t log_max_mmo_dma:5; > uint32_t log_max_mmo_compress:5; > uint32_t log_max_mmo_decompress:5; > + uint32_t umr_modify_entity_size_disabled:1; > + uint32_t umr_indirect_mkey_disabled:1; > }; >=20 > struct mlx5_devx_wq_attr { > -- > 2.25.1 Acked-by: Ori Kam Best, Ori