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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Acked-by: Kai Ji ________________________________ From: Nicolau, Radu Sent: 03 June 2025 11:30 To: Ji, Kai Cc: dev@dpdk.org ; Nicolau, Radu Subject: [PATCH v2] crypto/qat: remove ZUC 256 support Remove ZUC 256 support from Gen 3 and 5 hardware Signed-off-by: Radu Nicolau --- v2: removed usnused function doc/guides/rel_notes/release_25_07.rst | 5 ++ drivers/common/qat/qat_adf/icp_qat_hw.h | 2 +- drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c | 40 +--------------- drivers/crypto/qat/dev/qat_crypto_pmd_gen5.c | 49 ++------------------ drivers/crypto/qat/dev/qat_crypto_pmd_gens.h | 20 -------- drivers/crypto/qat/dev/qat_sym_pmd_gen1.c | 33 ------------- drivers/crypto/qat/qat_sym_session.c | 25 ++-------- drivers/crypto/qat/qat_sym_session.h | 1 - 8 files changed, 14 insertions(+), 161 deletions(-) diff --git a/doc/guides/rel_notes/release_25_07.rst b/doc/guides/rel_notes/= release_25_07.rst index 11bb6d34f7..07bfa71700 100644 --- a/doc/guides/rel_notes/release_25_07.rst +++ b/doc/guides/rel_notes/release_25_07.rst @@ -87,6 +87,11 @@ New Features Removed Items ------------- +* **Removed ZUC-256 algorithms from Intel QuickAssist Technology (QAT) PMD= .** + + Support for ZUC-256 cipher and integrity algorithms was removed from + Gen 3 and Gen 5 PMD. + .. This section should contain removed items in this release. Sample forma= t: * Add a short 1-2 sentence description of the removed item diff --git a/drivers/common/qat/qat_adf/icp_qat_hw.h b/drivers/common/qat/q= at_adf/icp_qat_hw.h index 1d61a0b833..e929b16df2 100644 --- a/drivers/common/qat/qat_adf/icp_qat_hw.h +++ b/drivers/common/qat/qat_adf/icp_qat_hw.h @@ -367,7 +367,7 @@ enum icp_qat_hw_cipher_convert { #define ICP_QAT_HW_CHACHAPOLY_ICV_SZ 16 #define ICP_QAT_HW_CHACHAPOLY_AAD_MAX_LOG 14 #define ICP_QAT_HW_ZUC_256_KEY_SZ 32 -#define ICP_QAT_HW_ZUC_256_IV_SZ 24 +#define ICP_QAT_HW_ZUC_256_IV_SZ 16 #define ICP_QAT_HW_CIPHER_MAX_KEY_SZ ICP_QAT_HW_AES_256_F8_KEY_SZ diff --git a/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c b/drivers/crypto/= qat/dev/qat_crypto_pmd_gen3.c index af664fb9b9..f2ff952482 100644 --- a/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c +++ b/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c @@ -204,7 +204,6 @@ qat_sym_crypto_cap_get_gen3(struct qat_cryptodev_privat= e *internals, uint32_t legacy_size =3D sizeof(qat_sym_crypto_legacy_caps_gen3); capa_num =3D size/sizeof(struct rte_cryptodev_capabilities); legacy_capa_num =3D legacy_size/sizeof(struct rte_cryptodev_capabi= lities); - struct rte_cryptodev_capabilities *cap; if (unlikely(internals->qat_dev->options.legacy_alg)) size =3D size + legacy_size; @@ -258,14 +257,6 @@ qat_sym_crypto_cap_get_gen3(struct qat_cryptodev_priva= te *internals, continue; } - if (slice_map & ICP_ACCEL_MASK_ZUC_256_SLICE && ( - check_auth_capa(&capabilities[iter], - RTE_CRYPTO_AUTH_ZUC_EIA3) || - check_cipher_capa(&capabilities[iter], - RTE_CRYPTO_CIPHER_ZUC_EEA3))) { - continue; - } - if (internals->qat_dev->options.has_wireless_slice && ( check_auth_capa(&capabilities[iter], RTE_CRYPTO_AUTH_KASUMI_F9) || @@ -279,27 +270,6 @@ qat_sym_crypto_cap_get_gen3(struct qat_cryptodev_priva= te *internals, memcpy(addr + curr_capa, capabilities + iter, sizeof(struct rte_cryptodev_capabilities)); - - if (internals->qat_dev->options.has_wireless_slice && ( - check_auth_capa(&capabilities[iter], - RTE_CRYPTO_AUTH_ZUC_EIA3))) { - cap =3D addr + curr_capa; - cap->sym.auth.key_size.max =3D 32; - cap->sym.auth.key_size.increment =3D 16; - cap->sym.auth.iv_size.max =3D 25; - cap->sym.auth.iv_size.increment =3D 1; - cap->sym.auth.digest_size.max =3D 16; - cap->sym.auth.digest_size.increment =3D 4; - } - if (internals->qat_dev->options.has_wireless_slice && ( - check_cipher_capa(&capabilities[iter], - RTE_CRYPTO_CIPHER_ZUC_EEA3))) { - cap =3D addr + curr_capa; - cap->sym.cipher.key_size.max =3D 32; - cap->sym.cipher.key_size.increment =3D 16; - cap->sym.cipher.iv_size.max =3D 25; - cap->sym.cipher.iv_size.increment =3D 1; - } curr_capa++; } internals->qat_dev_capabilities =3D internals->capa_mz->addr; @@ -558,16 +528,8 @@ qat_sym_crypto_set_session_gen3(void *cdev, void *sess= ion) (ctx->qat_cipher_alg =3D=3D ICP_QAT_HW_CIPHER_ALGO_SNOW_3G_UEA2 || ctx->qat_cipher_alg =3D=3D - ICP_QAT_HW_CIPHER_ALGO_ZUC_3G_128_EEA3 || - ctx->qat_cipher_alg =3D=3D ICP_QAT_HW_CIPHE= R_ALGO_ZUC_256))) { + ICP_QAT_HW_CIPHER_ALGO_ZUC_3G_128_EEA3))) { qat_sym_session_set_ext_hash_flags_gen2(ctx, 0); - } else if ((internals->qat_dev->options.has_wireless_slice)= && - (ctx->qat_hash_alg =3D=3D ICP_QAT_HW_AUTH_ALGO_ZUC_= 256_MAC_32 || - ctx->qat_hash_alg =3D=3D ICP_QAT_HW_AUTH_AL= GO_ZUC_256_MAC_64 || - ctx->qat_hash_alg =3D=3D ICP_QAT_HW_AUTH_AL= GO_ZUC_256_MAC_128) && - ctx->qat_cipher_alg !=3D ICP_QAT_HW_CIPHER_= ALGO_ZUC_256) { - qat_sym_session_set_ext_hash_flags_gen2(ctx, - 1 << ICP_QAT_FW_AUTH_HDR_FLAG_ZUC_E= IA3_BITPOS); } ret =3D 0; diff --git a/drivers/crypto/qat/dev/qat_crypto_pmd_gen5.c b/drivers/crypto/= qat/dev/qat_crypto_pmd_gen5.c index e1302e9b36..5714420e1e 100644 --- a/drivers/crypto/qat/dev/qat_crypto_pmd_gen5.c +++ b/drivers/crypto/qat/dev/qat_crypto_pmd_gen5.c @@ -113,11 +113,11 @@ static struct rte_cryptodev_capabilities qat_sym_cryp= to_caps_gen5[] =3D { CAP_RNG_ZERO(aad_size), CAP_RNG_ZERO(iv_size)), QAT_SYM_CIPHER_CAP(ZUC_EEA3, CAP_SET(block_size, 16), - CAP_RNG(key_size, 16, 32, 16), CAP_RNG(iv_size, 16, 25, 1))= , + CAP_RNG(key_size, 16, 16, 0), CAP_RNG(iv_size, 16, 16, 0)), QAT_SYM_AUTH_CAP(ZUC_EIA3, CAP_SET(block_size, 16), - CAP_RNG(key_size, 16, 32, 16), CAP_RNG(digest_size, 4, 16, = 4), - CAP_RNG_ZERO(aad_size), CAP_RNG(iv_size, 16, 25, 1)), + CAP_RNG(key_size, 16, 16, 0), CAP_RNG(digest_size, 4, 16, 4= ), + CAP_RNG_ZERO(aad_size), CAP_RNG(iv_size, 16, 16, 0)), QAT_SYM_CIPHER_CAP(SNOW3G_UEA2, CAP_SET(block_size, 16), CAP_RNG(key_size, 16, 16, 0), CAP_RNG(iv_size, 16, 16, 0))= , @@ -128,32 +128,6 @@ static struct rte_cryptodev_capabilities qat_sym_crypt= o_caps_gen5[] =3D { RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST() }; -static int -check_cipher_capa(const struct rte_cryptodev_capabilities *cap, - enum rte_crypto_cipher_algorithm algo) -{ - if (cap->op !=3D RTE_CRYPTO_OP_TYPE_SYMMETRIC) - return 0; - if (cap->sym.xform_type !=3D RTE_CRYPTO_SYM_XFORM_CIPHER) - return 0; - if (cap->sym.cipher.algo !=3D algo) - return 0; - return 1; -} - -static int -check_auth_capa(const struct rte_cryptodev_capabilities *cap, - enum rte_crypto_auth_algorithm algo) -{ - if (cap->op !=3D RTE_CRYPTO_OP_TYPE_SYMMETRIC) - return 0; - if (cap->sym.xform_type !=3D RTE_CRYPTO_SYM_XFORM_AUTH) - return 0; - if (cap->sym.auth.algo !=3D algo) - return 0; - return 1; -} - static int qat_sym_crypto_cap_get_gen5(struct qat_cryptodev_private *internals, const char *capa_memz_name, @@ -195,14 +169,6 @@ qat_sym_crypto_cap_get_gen5(struct qat_cryptodev_priva= te *internals, capabilities =3D qat_sym_crypto_caps_gen5; for (i =3D 0; i < capa_num; i++, iter++) { - if (slice_map & ICP_ACCEL_MASK_ZUC_256_SLICE && ( - check_auth_capa(&capabilities[iter], - RTE_CRYPTO_AUTH_ZUC_EIA3) || - check_cipher_capa(&capabilities[iter], - RTE_CRYPTO_CIPHER_ZUC_EEA3))) { - continue; - } - memcpy(addr + curr_capa, capabilities + iter, sizeof(struct rte_cryptodev_capabilities)); curr_capa++; @@ -233,15 +199,8 @@ qat_sym_crypto_set_session_gen5(void *cdev, void *sess= ion) (ctx->qat_cipher_alg =3D=3D ICP_QAT_HW_CIPHER_ALGO_SNOW_3G_UEA2 || ctx->qat_cipher_alg =3D=3D - ICP_QAT_HW_CIPHER_ALGO_ZUC_3G_128_EEA3 || - ctx->qat_cipher_alg =3D=3D ICP_QAT_HW_CIPHE= R_ALGO_ZUC_256)) { + ICP_QAT_HW_CIPHER_ALGO_ZUC_3G_128_EEA3)) { qat_sym_session_set_ext_hash_flags_gen2(ctx, 0); - } else if ((ctx->qat_hash_alg =3D=3D ICP_QAT_HW_AUTH_ALGO_Z= UC_256_MAC_32 || - ctx->qat_hash_alg =3D=3D ICP_QAT_HW_AUTH_AL= GO_ZUC_256_MAC_64 || - ctx->qat_hash_alg =3D=3D ICP_QAT_HW_AUTH_AL= GO_ZUC_256_MAC_128) && - ctx->qat_cipher_alg !=3D ICP_QAT_HW_CIPHER_= ALGO_ZUC_256) { - qat_sym_session_set_ext_hash_flags_gen2(ctx, - 1 << ICP_QAT_FW_AUTH_HDR_FLAG_ZUC_E= IA3_BITPOS); } ret =3D 0; diff --git a/drivers/crypto/qat/dev/qat_crypto_pmd_gens.h b/drivers/crypto/= qat/dev/qat_crypto_pmd_gens.h index 846636f57d..1f19c69f88 100644 --- a/drivers/crypto/qat/dev/qat_crypto_pmd_gens.h +++ b/drivers/crypto/qat/dev/qat_crypto_pmd_gens.h @@ -881,26 +881,6 @@ qat_sym_convert_op_to_vec_aead(struct rte_crypto_op *o= p, return 0; } -static inline void -zuc256_modify_iv(uint8_t *iv) -{ - uint8_t iv_tmp[8]; - - iv_tmp[0] =3D iv[16]; - /* pack the last 8 bytes of IV to 6 bytes. - * discard the 2 MSB bits of each byte - */ - iv_tmp[1] =3D (((iv[17] & 0x3f) << 2) | ((iv[18] >> 4) & 0x3)); - iv_tmp[2] =3D (((iv[18] & 0xf) << 4) | ((iv[19] >> 2) & 0xf)); - iv_tmp[3] =3D (((iv[19] & 0x3) << 6) | (iv[20] & 0x3f)); - - iv_tmp[4] =3D (((iv[21] & 0x3f) << 2) | ((iv[22] >> 4) & 0x3)); - iv_tmp[5] =3D (((iv[22] & 0xf) << 4) | ((iv[23] >> 2) & 0xf)); - iv_tmp[6] =3D (((iv[23] & 0x3) << 6) | (iv[24] & 0x3f)); - - memcpy(iv + 16, iv_tmp, 8); -} - static __rte_always_inline void qat_set_cipher_iv(struct icp_qat_fw_la_cipher_req_params *cipher_param, struct rte_crypto_va_iova_ptr *iv_ptr, uint32_t iv_len, diff --git a/drivers/crypto/qat/dev/qat_sym_pmd_gen1.c b/drivers/crypto/qat= /dev/qat_sym_pmd_gen1.c index 561166203c..8cb85fd8df 100644 --- a/drivers/crypto/qat/dev/qat_sym_pmd_gen1.c +++ b/drivers/crypto/qat/dev/qat_sym_pmd_gen1.c @@ -248,9 +248,6 @@ qat_sym_build_op_cipher_gen1(void *in_op, struct qat_sy= m_session *ctx, return -EINVAL; } - if (ctx->is_zuc256) - zuc256_modify_iv(cipher_iv.va); - enqueue_one_cipher_job_gen1(ctx, req, &cipher_iv, ofs, total_len, = op_cookie); qat_sym_debug_log_dump(req, ctx, in_sgl.vec, in_sgl.num, &cipher_i= v, @@ -303,9 +300,6 @@ qat_sym_build_op_auth_gen1(void *in_op, struct qat_sym_= session *ctx, return -EINVAL; } - if (ctx->is_zuc256) - zuc256_modify_iv(auth_iv.va); - enqueue_one_auth_job_gen1(ctx, req, &digest, &auth_iv, ofs, total_len); @@ -396,11 +390,6 @@ qat_sym_build_op_chain_gen1(void *in_op, struct qat_sy= m_session *ctx, return -EINVAL; } - if (ctx->is_zuc256) { - zuc256_modify_iv(cipher_iv.va); - zuc256_modify_iv(auth_iv.va); - } - enqueue_one_chain_job_gen1(ctx, req, in_sgl.vec, in_sgl.num, out_sgl.vec, out_sgl.num, &cipher_iv, &digest, &au= th_iv, ofs, total_len, cookie); @@ -527,9 +516,6 @@ qat_sym_dp_enqueue_single_cipher_gen1(void *qp_data, ui= nt8_t *drv_ctx, if (unlikely(data_len < 0)) return -1; - if (ctx->is_zuc256) - zuc256_modify_iv(iv->va); - enqueue_one_cipher_job_gen1(ctx, req, iv, ofs, (uint32_t)data_len,= cookie); qat_sym_debug_log_dump(req, ctx, data, n_data_vecs, iv, @@ -591,9 +577,6 @@ qat_sym_dp_enqueue_cipher_jobs_gen1(void *qp_data, uint= 8_t *drv_ctx, if (unlikely(data_len < 0 || error)) break; - if (ctx->is_zuc256) - zuc256_modify_iv(vec->iv[i].va); - enqueue_one_cipher_job_gen1(ctx, req, &vec->iv[i], ofs, (uint32_t)data_len, cookie); tail =3D (tail + tx_queue->msg_size) & tx_queue->modulo_ma= sk; @@ -644,9 +627,6 @@ qat_sym_dp_enqueue_single_auth_gen1(void *qp_data, uint= 8_t *drv_ctx, if (unlikely(data_len < 0)) return -1; - if (ctx->is_zuc256) - zuc256_modify_iv(auth_iv->va); - if (ctx->qat_hash_alg =3D=3D ICP_QAT_HW_AUTH_ALGO_NULL) { null_digest.iova =3D cookie->digest_null_phys_addr; job_digest =3D &null_digest; @@ -716,9 +696,6 @@ qat_sym_dp_enqueue_auth_jobs_gen1(void *qp_data, uint8_= t *drv_ctx, if (unlikely(data_len < 0 || error)) break; - if (ctx->is_zuc256) - zuc256_modify_iv(vec->auth_iv[i].va); - if (ctx->qat_hash_alg =3D=3D ICP_QAT_HW_AUTH_ALGO_NULL) { null_digest.iova =3D cookie->digest_null_phys_addr= ; job_digest =3D &null_digest; @@ -774,11 +751,6 @@ qat_sym_dp_enqueue_single_chain_gen1(void *qp_data, ui= nt8_t *drv_ctx, if (unlikely(data_len < 0)) return -1; - if (ctx->is_zuc256) { - zuc256_modify_iv(cipher_iv->va); - zuc256_modify_iv(auth_iv->va); - } - if (ctx->qat_hash_alg =3D=3D ICP_QAT_HW_AUTH_ALGO_NULL) { null_digest.iova =3D cookie->digest_null_phys_addr; job_digest =3D &null_digest; @@ -849,11 +821,6 @@ qat_sym_dp_enqueue_chain_jobs_gen1(void *qp_data, uint= 8_t *drv_ctx, if (unlikely(data_len < 0 || error)) break; - if (ctx->is_zuc256) { - zuc256_modify_iv(vec->iv[i].va); - zuc256_modify_iv(vec->auth_iv[i].va); - } - if (ctx->qat_hash_alg =3D=3D ICP_QAT_HW_AUTH_ALGO_NULL) { null_digest.iova =3D cookie->digest_null_phys_addr= ; job_digest =3D &null_digest; diff --git a/drivers/crypto/qat/qat_sym_session.c b/drivers/crypto/qat/qat_= sym_session.c index 7f370f03fb..8489e26e28 100644 --- a/drivers/crypto/qat/qat_sym_session.c +++ b/drivers/crypto/qat/qat_sym_session.c @@ -541,8 +541,6 @@ qat_sym_session_configure_cipher(struct rte_cryptodev *= dev, goto error_out; } session->qat_mode =3D ICP_QAT_HW_CIPHER_ECB_MODE; - if (cipher_xform->key.length =3D=3D ICP_QAT_HW_ZUC_256_KEY_= SZ) - session->is_zuc256 =3D 1; if (internals->qat_dev->options.has_wireless_slice) is_wireless =3D 1; break; @@ -989,25 +987,8 @@ qat_sym_session_configure_auth(struct rte_cryptodev *d= ev, rte_cryptodev_get_auth_algo_string(auth_xf= orm->algo)); return -ENOTSUP; } - if (key_length =3D=3D ICP_QAT_HW_ZUC_3G_EEA3_KEY_SZ) + if (key_length =3D=3D ICP_QAT_HW_ZUC_3G_EEA3_KEY_SZ) { session->qat_hash_alg =3D ICP_QAT_HW_AUTH_ALGO_ZUC= _3G_128_EIA3; - else if (key_length =3D=3D ICP_QAT_HW_ZUC_256_KEY_SZ) { - switch (auth_xform->digest_length) { - case 4: - session->qat_hash_alg =3D ICP_QAT_HW_AUTH_A= LGO_ZUC_256_MAC_32; - break; - case 8: - session->qat_hash_alg =3D ICP_QAT_HW_AUTH_A= LGO_ZUC_256_MAC_64; - break; - case 16: - session->qat_hash_alg =3D ICP_QAT_HW_AUTH_A= LGO_ZUC_256_MAC_128; - break; - default: - QAT_LOG(ERR, "Invalid digest length: %d", - auth_xform->digest_length); - return -ENOTSUP; - } - session->is_zuc256 =3D 1; } else { QAT_LOG(ERR, "Invalid key length: %d", key_length)= ; return -ENOTSUP; @@ -2238,8 +2219,8 @@ int qat_sym_cd_cipher_set(struct qat_sym_session *cde= sc, cdesc->qat_proto_flag =3D QAT_CRYPTO_PROTO_FLAG_ZUC; } else if (cdesc->qat_cipher_alg =3D=3D ICP_QAT_HW_CIPHER_ALGO_ZUC_256) { - if (cdesc->cipher_iv.length !=3D 23 && cdesc->cipher_iv.len= gth !=3D 25) { - QAT_LOG(ERR, "Invalid IV length for ZUC256, must be= 23 or 25."); + if (cdesc->cipher_iv.length !=3D ICP_QAT_HW_ZUC_256_IV_SZ) = { + QAT_LOG(ERR, "Invalid IV length for ZUC256"); return -EINVAL; } total_key_size =3D ICP_QAT_HW_ZUC_256_KEY_SZ + diff --git a/drivers/crypto/qat/qat_sym_session.h b/drivers/crypto/qat/qat_= sym_session.h index 2ef2066646..0c7b9cc6cf 100644 --- a/drivers/crypto/qat/qat_sym_session.h +++ b/drivers/crypto/qat/qat_sym_session.h @@ -147,7 +147,6 @@ struct qat_sym_session { uint8_t is_auth; uint8_t is_cnt_zero; /* Some generations need different setup of counter */ - uint8_t is_zuc256; uint8_t is_wireless; uint32_t slice_types; struct rte_net_crc *crc; -- 2.43.0 --_000_DS0PR11MB7458C75FF5E750AFE8263DFE816FADS0PR11MB7458namp_ Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable
Acked-by: Kai Ji <kai.ji@intel.com>

From: Nicolau, Radu <rad= u.nicolau@intel.com>
Sent: 03 June 2025 11:30
To: Ji, Kai <kai.ji@intel.com>
Cc: dev@dpdk.org <dev@dpdk.org>; Nicolau, Radu <radu.nicola= u@intel.com>
Subject: [PATCH v2] crypto/qat: remove ZUC 256 support
 
Remove ZUC 256 support from Gen 3 and 5 hardware
Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
---
v2: removed usnused function

 doc/guides/rel_notes/release_25_07.rst     &= nbsp; |  5 ++
 drivers/common/qat/qat_adf/icp_qat_hw.h     = |  2 +-
 drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c | 40 +---------------  drivers/crypto/qat/dev/qat_crypto_pmd_gen5.c | 49 ++-----------------= -
 drivers/crypto/qat/dev/qat_crypto_pmd_gens.h | 20 --------
 drivers/crypto/qat/dev/qat_sym_pmd_gen1.c    | 33 ----= ---------
 drivers/crypto/qat/qat_sym_session.c     &nb= sp;   | 25 ++--------
 drivers/crypto/qat/qat_sym_session.h     &nb= sp;   |  1 -
 8 files changed, 14 insertions(+), 161 deletions(-)

diff --git a/doc/guides/rel_notes/release_25_07.rst b/doc/guides/rel_notes/= release_25_07.rst
index 11bb6d34f7..07bfa71700 100644
--- a/doc/guides/rel_notes/release_25_07.rst
+++ b/doc/guides/rel_notes/release_25_07.rst
@@ -87,6 +87,11 @@ New Features
 Removed Items
 -------------
 
+* **Removed ZUC-256 algorithms from Intel QuickAssist Technology (QAT) PMD= .**
+
+  Support for ZUC-256 cipher and integrity algorithms was removed fro= m
+  Gen 3 and Gen 5 PMD.
+
 .. This section should contain removed items in this release. Sample = format:
 
    * Add a short 1-2 sentence description of the removed it= em
diff --git a/drivers/common/qat/qat_adf/icp_qat_hw.h b/drivers/common/qat/q= at_adf/icp_qat_hw.h
index 1d61a0b833..e929b16df2 100644
--- a/drivers/common/qat/qat_adf/icp_qat_hw.h
+++ b/drivers/common/qat/qat_adf/icp_qat_hw.h
@@ -367,7 +367,7 @@ enum icp_qat_hw_cipher_convert {
 #define ICP_QAT_HW_CHACHAPOLY_ICV_SZ 16
 #define ICP_QAT_HW_CHACHAPOLY_AAD_MAX_LOG 14
 #define ICP_QAT_HW_ZUC_256_KEY_SZ 32
-#define ICP_QAT_HW_ZUC_256_IV_SZ 24
+#define ICP_QAT_HW_ZUC_256_IV_SZ 16
 
 #define ICP_QAT_HW_CIPHER_MAX_KEY_SZ ICP_QAT_HW_AES_256_F8_KEY_SZ
 
diff --git a/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c b/drivers/crypto/= qat/dev/qat_crypto_pmd_gen3.c
index af664fb9b9..f2ff952482 100644
--- a/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c
+++ b/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c
@@ -204,7 +204,6 @@ qat_sym_crypto_cap_get_gen3(struct qat_cryptodev_privat= e *internals,
         uint32_t legacy_size =3D s= izeof(qat_sym_crypto_legacy_caps_gen3);
         capa_num =3D size/sizeof(s= truct rte_cryptodev_capabilities);
         legacy_capa_num =3D legacy= _size/sizeof(struct rte_cryptodev_capabilities);
-       struct rte_cryptodev_capabilities *ca= p;
 
         if (unlikely(internals->= ;qat_dev->options.legacy_alg))
            &nb= sp;    size =3D size + legacy_size;
@@ -258,14 +257,6 @@ qat_sym_crypto_cap_get_gen3(struct qat_cryptodev_priva= te *internals,
            &nb= sp;            conti= nue;
            &nb= sp;    }
 
-            &n= bsp;  if (slice_map & ICP_ACCEL_MASK_ZUC_256_SLICE && ( -            &n= bsp;          check_auth_capa(= &capabilities[iter],
-            &n= bsp;            = ;      RTE_CRYPTO_AUTH_ZUC_EIA3) ||
-            &n= bsp;          check_cipher_cap= a(&capabilities[iter],
-            &n= bsp;            = ;      RTE_CRYPTO_CIPHER_ZUC_EEA3))) {
-            &n= bsp;          continue;
-            &n= bsp;  }
-
            &nb= sp;    if (internals->qat_dev->options.has_wireless_sl= ice && (
            &nb= sp;            check= _auth_capa(&capabilities[iter],
            &nb= sp;            =         RTE_CRYPTO_AUTH_KASUMI_F9) || @@ -279,27 +270,6 @@ qat_sym_crypto_cap_get_gen3(struct qat_cryptodev_priva= te *internals,
 
            &nb= sp;    memcpy(addr + curr_capa, capabilities + iter,
            &nb= sp;            sizeo= f(struct rte_cryptodev_capabilities));
-
-            &n= bsp;  if (internals->qat_dev->options.has_wireless_slice &&a= mp; (
-            &n= bsp;          check_auth_capa(= &capabilities[iter],
-            &n= bsp;            = ;      RTE_CRYPTO_AUTH_ZUC_EIA3))) {
-            &n= bsp;          cap =3D addr + c= urr_capa;
-            &n= bsp;          cap->sym.auth= .key_size.max =3D 32;
-            &n= bsp;          cap->sym.auth= .key_size.increment =3D 16;
-            &n= bsp;          cap->sym.auth= .iv_size.max =3D 25;
-            &n= bsp;          cap->sym.auth= .iv_size.increment =3D 1;
-            &n= bsp;          cap->sym.auth= .digest_size.max =3D 16;
-            &n= bsp;          cap->sym.auth= .digest_size.increment =3D 4;
-            &n= bsp;  }
-            &n= bsp;  if (internals->qat_dev->options.has_wireless_slice &&a= mp; (
-            &n= bsp;          check_cipher_cap= a(&capabilities[iter],
-            &n= bsp;            = ;      RTE_CRYPTO_CIPHER_ZUC_EEA3))) {
-            &n= bsp;          cap =3D addr + c= urr_capa;
-            &n= bsp;          cap->sym.ciph= er.key_size.max =3D 32;
-            &n= bsp;          cap->sym.ciph= er.key_size.increment =3D 16;
-            &n= bsp;          cap->sym.ciph= er.iv_size.max =3D 25;
-            &n= bsp;          cap->sym.ciph= er.iv_size.increment =3D 1;
-            &n= bsp;  }
            &nb= sp;    curr_capa++;
         }
         internals->qat_dev_capa= bilities =3D internals->capa_mz->addr;
@@ -558,16 +528,8 @@ qat_sym_crypto_set_session_gen3(void *cdev, void *sess= ion)
            &nb= sp;            =         (ctx->qat_cipher_alg =3D=3D             &nb= sp;            =         ICP_QAT_HW_CIPHER_ALGO_SNOW_3G_U= EA2 ||
            &nb= sp;            =         ctx->qat_cipher_alg =3D=3D -            &n= bsp;            = ;      ICP_QAT_HW_CIPHER_ALGO_ZUC_3G_128_EEA3 || -            &n= bsp;            = ;      ctx->qat_cipher_alg =3D=3D ICP_QAT_HW_CI= PHER_ALGO_ZUC_256))) {
+            &n= bsp;            = ;      ICP_QAT_HW_CIPHER_ALGO_ZUC_3G_128_EEA3))) {=
            &nb= sp;            qat_s= ym_session_set_ext_hash_flags_gen2(ctx, 0);
-            &n= bsp;  } else if ((internals->qat_dev->options.has_wireless_slice= ) &&
-            &n= bsp;          (ctx->qat_has= h_alg =3D=3D ICP_QAT_HW_AUTH_ALGO_ZUC_256_MAC_32 ||
-            &n= bsp;            = ;      ctx->qat_hash_alg =3D=3D ICP_QAT_HW_AUTH= _ALGO_ZUC_256_MAC_64 ||
-            &n= bsp;            = ;      ctx->qat_hash_alg =3D=3D ICP_QAT_HW_AUTH= _ALGO_ZUC_256_MAC_128) &&
-            &n= bsp;            = ;      ctx->qat_cipher_alg !=3D ICP_QAT_HW_CIPH= ER_ALGO_ZUC_256) {
-            &n= bsp;          qat_sym_session_= set_ext_hash_flags_gen2(ctx,
-            &n= bsp;            = ;            &n= bsp; 1 << ICP_QAT_FW_AUTH_HDR_FLAG_ZUC_EIA3_BITPOS);
            &nb= sp;    }
 
            &nb= sp;    ret =3D 0;
diff --git a/drivers/crypto/qat/dev/qat_crypto_pmd_gen5.c b/drivers/crypto/= qat/dev/qat_crypto_pmd_gen5.c
index e1302e9b36..5714420e1e 100644
--- a/drivers/crypto/qat/dev/qat_crypto_pmd_gen5.c
+++ b/drivers/crypto/qat/dev/qat_crypto_pmd_gen5.c
@@ -113,11 +113,11 @@ static struct rte_cryptodev_capabilities qat_sym_cryp= to_caps_gen5[] =3D {
            &nb= sp;    CAP_RNG_ZERO(aad_size), CAP_RNG_ZERO(iv_size)),
         QAT_SYM_CIPHER_CAP(ZUC_EEA= 3,
            &nb= sp;    CAP_SET(block_size, 16),
-            &n= bsp;  CAP_RNG(key_size, 16, 32, 16), CAP_RNG(iv_size, 16, 25, 1)),
+            &n= bsp;  CAP_RNG(key_size, 16, 16, 0), CAP_RNG(iv_size, 16, 16, 0)),
         QAT_SYM_AUTH_CAP(ZUC_EIA3,=
            &nb= sp;    CAP_SET(block_size, 16),
-            &n= bsp;  CAP_RNG(key_size, 16, 32, 16), CAP_RNG(digest_size, 4, 16, 4), -            &n= bsp;  CAP_RNG_ZERO(aad_size), CAP_RNG(iv_size, 16, 25, 1)),
+            &n= bsp;  CAP_RNG(key_size, 16, 16, 0), CAP_RNG(digest_size, 4, 16, 4), +            &n= bsp;  CAP_RNG_ZERO(aad_size), CAP_RNG(iv_size, 16, 16, 0)),
         QAT_SYM_CIPHER_CAP(SNOW3G_= UEA2,
            &nb= sp;    CAP_SET(block_size, 16),
            &nb= sp;    CAP_RNG(key_size, 16, 16, 0), CAP_RNG(iv_size, 16, 16= , 0)),
@@ -128,32 +128,6 @@ static struct rte_cryptodev_capabilities qat_sym_crypt= o_caps_gen5[] =3D {
         RTE_CRYPTODEV_END_OF_CAPAB= ILITIES_LIST()
 };
 
-static int
-check_cipher_capa(const struct rte_cryptodev_capabilities *cap,
-            &n= bsp;  enum rte_crypto_cipher_algorithm algo)
-{
-       if (cap->op !=3D RTE_CRYPTO_OP_TYP= E_SYMMETRIC)
-            &n= bsp;  return 0;
-       if (cap->sym.xform_type !=3D RTE_C= RYPTO_SYM_XFORM_CIPHER)
-            &n= bsp;  return 0;
-       if (cap->sym.cipher.algo !=3D algo= )
-            &n= bsp;  return 0;
-       return 1;
-}
-
-static int
-check_auth_capa(const struct rte_cryptodev_capabilities *cap,
-            &n= bsp;  enum rte_crypto_auth_algorithm algo)
-{
-       if (cap->op !=3D RTE_CRYPTO_OP_TYP= E_SYMMETRIC)
-            &n= bsp;  return 0;
-       if (cap->sym.xform_type !=3D RTE_C= RYPTO_SYM_XFORM_AUTH)
-            &n= bsp;  return 0;
-       if (cap->sym.auth.algo !=3D algo)<= br> -            &n= bsp;  return 0;
-       return 1;
-}
-
 static int
 qat_sym_crypto_cap_get_gen5(struct qat_cryptodev_private *internals,<= br>             &nb= sp;            const= char *capa_memz_name,
@@ -195,14 +169,6 @@ qat_sym_crypto_cap_get_gen5(struct qat_cryptodev_priva= te *internals,
         capabilities =3D qat_sym_c= rypto_caps_gen5;
 
         for (i =3D 0; i < capa_= num; i++, iter++) {
-            &n= bsp;  if (slice_map & ICP_ACCEL_MASK_ZUC_256_SLICE && ( -            &n= bsp;          check_auth_capa(= &capabilities[iter],
-            &n= bsp;            = ;      RTE_CRYPTO_AUTH_ZUC_EIA3) ||
-            &n= bsp;          check_cipher_cap= a(&capabilities[iter],
-            &n= bsp;            = ;      RTE_CRYPTO_CIPHER_ZUC_EEA3))) {
-            &n= bsp;          continue;
-            &n= bsp;  }
-
            &nb= sp;    memcpy(addr + curr_capa, capabilities + iter,
            &nb= sp;            sizeo= f(struct rte_cryptodev_capabilities));
            &nb= sp;    curr_capa++;
@@ -233,15 +199,8 @@ qat_sym_crypto_set_session_gen5(void *cdev, void *sess= ion)
            &nb= sp;            =         (ctx->qat_cipher_alg =3D=3D             &nb= sp;            =         ICP_QAT_HW_CIPHER_ALGO_SNOW_3G_U= EA2 ||
            &nb= sp;            =         ctx->qat_cipher_alg =3D=3D -            &n= bsp;            = ;      ICP_QAT_HW_CIPHER_ALGO_ZUC_3G_128_EEA3 || -            &n= bsp;            = ;      ctx->qat_cipher_alg =3D=3D ICP_QAT_HW_CI= PHER_ALGO_ZUC_256)) {
+            &n= bsp;            = ;      ICP_QAT_HW_CIPHER_ALGO_ZUC_3G_128_EEA3)) {<= br>             &nb= sp;            qat_s= ym_session_set_ext_hash_flags_gen2(ctx, 0);
-            &n= bsp;  } else if ((ctx->qat_hash_alg =3D=3D ICP_QAT_HW_AUTH_ALGO_ZUC= _256_MAC_32 ||
-            &n= bsp;            = ;      ctx->qat_hash_alg =3D=3D ICP_QAT_HW_AUTH= _ALGO_ZUC_256_MAC_64 ||
-            &n= bsp;            = ;      ctx->qat_hash_alg =3D=3D ICP_QAT_HW_AUTH= _ALGO_ZUC_256_MAC_128) &&
-            &n= bsp;            = ;      ctx->qat_cipher_alg !=3D ICP_QAT_HW_CIPH= ER_ALGO_ZUC_256) {
-            &n= bsp;          qat_sym_session_= set_ext_hash_flags_gen2(ctx,
-            &n= bsp;            = ;            &n= bsp; 1 << ICP_QAT_FW_AUTH_HDR_FLAG_ZUC_EIA3_BITPOS);
            &nb= sp;    }
 
            &nb= sp;    ret =3D 0;
diff --git a/drivers/crypto/qat/dev/qat_crypto_pmd_gens.h b/drivers/crypto/= qat/dev/qat_crypto_pmd_gens.h
index 846636f57d..1f19c69f88 100644
--- a/drivers/crypto/qat/dev/qat_crypto_pmd_gens.h
+++ b/drivers/crypto/qat/dev/qat_crypto_pmd_gens.h
@@ -881,26 +881,6 @@ qat_sym_convert_op_to_vec_aead(struct rte_crypto_op *o= p,
         return 0;
 }
 
-static inline void
-zuc256_modify_iv(uint8_t *iv)
-{
-       uint8_t iv_tmp[8];
-
-       iv_tmp[0] =3D iv[16];
-       /* pack the last 8 bytes of IV to 6 b= ytes.
-        * discard the 2 MSB bits of eac= h byte
-        */
-       iv_tmp[1] =3D (((iv[17] & 0x3f) &= lt;< 2) | ((iv[18] >> 4) & 0x3));
-       iv_tmp[2] =3D (((iv[18] & 0xf) &l= t;< 4) | ((iv[19] >> 2) & 0xf));
-       iv_tmp[3] =3D (((iv[19] & 0x3) &l= t;< 6) | (iv[20] & 0x3f));
-
-       iv_tmp[4] =3D (((iv[21] & 0x3f) &= lt;< 2) | ((iv[22] >> 4) & 0x3));
-       iv_tmp[5] =3D (((iv[22] & 0xf) &l= t;< 4) | ((iv[23] >> 2) & 0xf));
-       iv_tmp[6] =3D (((iv[23] & 0x3) &l= t;< 6) | (iv[24] & 0x3f));
-
-       memcpy(iv + 16, iv_tmp, 8);
-}
-
 static __rte_always_inline void
 qat_set_cipher_iv(struct icp_qat_fw_la_cipher_req_params *cipher_para= m,
            &nb= sp;    struct rte_crypto_va_iova_ptr *iv_ptr, uint32_t iv_le= n,
diff --git a/drivers/crypto/qat/dev/qat_sym_pmd_gen1.c b/drivers/crypto/qat= /dev/qat_sym_pmd_gen1.c
index 561166203c..8cb85fd8df 100644
--- a/drivers/crypto/qat/dev/qat_sym_pmd_gen1.c
+++ b/drivers/crypto/qat/dev/qat_sym_pmd_gen1.c
@@ -248,9 +248,6 @@ qat_sym_build_op_cipher_gen1(void *in_op, struct qat_sy= m_session *ctx,
            &nb= sp;    return -EINVAL;
         }
 
-       if (ctx->is_zuc256)
-            &n= bsp;  zuc256_modify_iv(cipher_iv.va);
-
         enqueue_one_cipher_job_gen= 1(ctx, req, &cipher_iv, ofs, total_len, op_cookie);
 
         qat_sym_debug_log_dump(req= , ctx, in_sgl.vec, in_sgl.num, &cipher_iv,
@@ -303,9 +300,6 @@ qat_sym_build_op_auth_gen1(void *in_op, struct qat_sym_= session *ctx,
            &nb= sp;    return -EINVAL;
         }
 
-       if (ctx->is_zuc256)
-            &n= bsp;  zuc256_modify_iv(auth_iv.va);
-
         enqueue_one_auth_job_gen1(= ctx, req, &digest, &auth_iv, ofs,
            &nb= sp;            total= _len);
 
@@ -396,11 +390,6 @@ qat_sym_build_op_chain_gen1(void *in_op, struct qat_sy= m_session *ctx,
            &nb= sp;    return -EINVAL;
         }
 
-       if (ctx->is_zuc256) {
-            &n= bsp;  zuc256_modify_iv(cipher_iv.va);
-            &n= bsp;  zuc256_modify_iv(auth_iv.va);
-       }
-
         enqueue_one_chain_job_gen1= (ctx, req, in_sgl.vec, in_sgl.num,
            &nb= sp;            out_s= gl.vec, out_sgl.num, &cipher_iv, &digest, &auth_iv,
            &nb= sp;            ofs, = total_len, cookie);
@@ -527,9 +516,6 @@ qat_sym_dp_enqueue_single_cipher_gen1(void *qp_data, ui= nt8_t *drv_ctx,
         if (unlikely(data_len <= 0))
            &nb= sp;    return -1;
 
-       if (ctx->is_zuc256)
-            &n= bsp;  zuc256_modify_iv(iv->va);
-
         enqueue_one_cipher_job_gen= 1(ctx, req, iv, ofs, (uint32_t)data_len, cookie);
 
         qat_sym_debug_log_dump(req= , ctx, data, n_data_vecs, iv,
@@ -591,9 +577,6 @@ qat_sym_dp_enqueue_cipher_jobs_gen1(void *qp_data, uint= 8_t *drv_ctx,
            &nb= sp;    if (unlikely(data_len < 0 || error))
            &nb= sp;            break= ;
 
-            &n= bsp;  if (ctx->is_zuc256)
-            &n= bsp;          zuc256_modify_iv= (vec->iv[i].va);
-
            &nb= sp;    enqueue_one_cipher_job_gen1(ctx, req, &vec->iv= [i], ofs,
            &nb= sp;            (uint= 32_t)data_len, cookie);
            &nb= sp;    tail =3D (tail + tx_queue->msg_size) & tx_queu= e->modulo_mask;
@@ -644,9 +627,6 @@ qat_sym_dp_enqueue_single_auth_gen1(void *qp_data, uint= 8_t *drv_ctx,
         if (unlikely(data_len <= 0))
            &nb= sp;    return -1;
 
-       if (ctx->is_zuc256)
-            &n= bsp;  zuc256_modify_iv(auth_iv->va);
-
         if (ctx->qat_hash_alg = =3D=3D ICP_QAT_HW_AUTH_ALGO_NULL) {
            &nb= sp;    null_digest.iova =3D cookie->digest_null_phys_addr= ;
            &nb= sp;    job_digest =3D &null_digest;
@@ -716,9 +696,6 @@ qat_sym_dp_enqueue_auth_jobs_gen1(void *qp_data, uint8_= t *drv_ctx,
            &nb= sp;    if (unlikely(data_len < 0 || error))
            &nb= sp;            break= ;
 
-            &n= bsp;  if (ctx->is_zuc256)
-            &n= bsp;          zuc256_modify_iv= (vec->auth_iv[i].va);
-
            &nb= sp;    if (ctx->qat_hash_alg =3D=3D ICP_QAT_HW_AUTH_ALGO_= NULL) {
            &nb= sp;            null_= digest.iova =3D cookie->digest_null_phys_addr;
            &nb= sp;            job_d= igest =3D &null_digest;
@@ -774,11 +751,6 @@ qat_sym_dp_enqueue_single_chain_gen1(void *qp_data, ui= nt8_t *drv_ctx,
         if (unlikely(data_len <= 0))
            &nb= sp;    return -1;
 
-       if (ctx->is_zuc256) {
-            &n= bsp;  zuc256_modify_iv(cipher_iv->va);
-            &n= bsp;  zuc256_modify_iv(auth_iv->va);
-       }
-
         if (ctx->qat_hash_alg = =3D=3D ICP_QAT_HW_AUTH_ALGO_NULL) {
            &nb= sp;    null_digest.iova =3D cookie->digest_null_phys_addr= ;
            &nb= sp;    job_digest =3D &null_digest;
@@ -849,11 +821,6 @@ qat_sym_dp_enqueue_chain_jobs_gen1(void *qp_data, uint= 8_t *drv_ctx,
            &nb= sp;    if (unlikely(data_len < 0 || error))
            &nb= sp;            break= ;
 
-            &n= bsp;  if (ctx->is_zuc256) {
-            &n= bsp;          zuc256_modify_iv= (vec->iv[i].va);
-            &n= bsp;          zuc256_modify_iv= (vec->auth_iv[i].va);
-            &n= bsp;  }
-
            &nb= sp;    if (ctx->qat_hash_alg =3D=3D ICP_QAT_HW_AUTH_ALGO_= NULL) {
            &nb= sp;            null_= digest.iova =3D cookie->digest_null_phys_addr;
            &nb= sp;            job_d= igest =3D &null_digest;
diff --git a/drivers/crypto/qat/qat_sym_session.c b/drivers/crypto/qat/qat_= sym_session.c
index 7f370f03fb..8489e26e28 100644
--- a/drivers/crypto/qat/qat_sym_session.c
+++ b/drivers/crypto/qat/qat_sym_session.c
@@ -541,8 +541,6 @@ qat_sym_session_configure_cipher(struct rte_cryptodev *= dev,
            &nb= sp;            goto = error_out;
            &nb= sp;    }
            &nb= sp;    session->qat_mode =3D ICP_QAT_HW_CIPHER_ECB_MODE;<= br> -            &n= bsp;  if (cipher_xform->key.length =3D=3D ICP_QAT_HW_ZUC_256_KEY_SZ= )
-            &n= bsp;          session->is_z= uc256 =3D 1;
            &nb= sp;    if (internals->qat_dev->options.has_wireless_sl= ice)
            &nb= sp;            is_wi= reless =3D 1;
            &nb= sp;    break;
@@ -989,25 +987,8 @@ qat_sym_session_configure_auth(struct rte_cryptodev *d= ev,
            &nb= sp;            =         rte_cryptodev_get_auth_algo_stri= ng(auth_xform->algo));
            &nb= sp;            retur= n -ENOTSUP;
            &nb= sp;    }
-            &n= bsp;  if (key_length =3D=3D ICP_QAT_HW_ZUC_3G_EEA3_KEY_SZ)
+            &n= bsp;  if (key_length =3D=3D ICP_QAT_HW_ZUC_3G_EEA3_KEY_SZ) {
            &nb= sp;            sessi= on->qat_hash_alg =3D ICP_QAT_HW_AUTH_ALGO_ZUC_3G_128_EIA3;
-            &n= bsp;  else if (key_length =3D=3D ICP_QAT_HW_ZUC_256_KEY_SZ) {
-            &n= bsp;          switch (auth_xfo= rm->digest_length) {
-            &n= bsp;          case 4:
-            &n= bsp;            = ;      session->qat_hash_alg =3D ICP_QAT_HW_AUT= H_ALGO_ZUC_256_MAC_32;
-            &n= bsp;            = ;      break;
-            &n= bsp;          case 8:
-            &n= bsp;            = ;      session->qat_hash_alg =3D ICP_QAT_HW_AUT= H_ALGO_ZUC_256_MAC_64;
-            &n= bsp;            = ;      break;
-            &n= bsp;          case 16:
-            &n= bsp;            = ;      session->qat_hash_alg =3D ICP_QAT_HW_AUT= H_ALGO_ZUC_256_MAC_128;
-            &n= bsp;            = ;      break;
-            &n= bsp;          default:
-            &n= bsp;            = ;      QAT_LOG(ERR, "Invalid digest length: %= d",
-            &n= bsp;            = ;            &n= bsp;         auth_xform->digest_= length);
-            &n= bsp;            = ;      return -ENOTSUP;
-            &n= bsp;          }
-            &n= bsp;          session->is_z= uc256 =3D 1;
            &nb= sp;    } else {
            &nb= sp;            QAT_L= OG(ERR, "Invalid key length: %d", key_length);
            &nb= sp;            retur= n -ENOTSUP;
@@ -2238,8 +2219,8 @@ int qat_sym_cd_cipher_set(struct qat_sym_session *cde= sc,
            &nb= sp;    cdesc->qat_proto_flag =3D QAT_CRYPTO_PROTO_FLAG_ZU= C;
         } else if (cdesc->qat_c= ipher_alg =3D=3D
            &nb= sp;            ICP_Q= AT_HW_CIPHER_ALGO_ZUC_256) {
-            &n= bsp;  if (cdesc->cipher_iv.length !=3D 23 && cdesc->ciph= er_iv.length !=3D 25) {
-            &n= bsp;          QAT_LOG(ERR, &qu= ot;Invalid IV length for ZUC256, must be 23 or 25.");
+            &n= bsp;  if (cdesc->cipher_iv.length !=3D ICP_QAT_HW_ZUC_256_IV_SZ) {<= br> +            &n= bsp;          QAT_LOG(ERR, &qu= ot;Invalid IV length for ZUC256");
            &nb= sp;            retur= n -EINVAL;
            &nb= sp;    }
            &nb= sp;    total_key_size =3D ICP_QAT_HW_ZUC_256_KEY_SZ +
diff --git a/drivers/crypto/qat/qat_sym_session.h b/drivers/crypto/qat/qat_= sym_session.h
index 2ef2066646..0c7b9cc6cf 100644
--- a/drivers/crypto/qat/qat_sym_session.h
+++ b/drivers/crypto/qat/qat_sym_session.h
@@ -147,7 +147,6 @@ struct qat_sym_session {
         uint8_t is_auth;
         uint8_t is_cnt_zero;
         /* Some generations need d= ifferent setup of counter */
-       uint8_t is_zuc256;
         uint8_t is_wireless;
         uint32_t slice_types;
         struct rte_net_crc *crc; --
2.43.0

--_000_DS0PR11MB7458C75FF5E750AFE8263DFE816FADS0PR11MB7458namp_--