From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id A47BF2C2A for ; Fri, 16 Sep 2016 03:43:48 +0200 (CEST) Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga101.jf.intel.com with ESMTP; 15 Sep 2016 18:43:47 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.30,342,1470726000"; d="scan'208";a="9284906" Received: from irsmsx102.ger.corp.intel.com ([163.33.3.155]) by fmsmga005.fm.intel.com with ESMTP; 15 Sep 2016 18:43:46 -0700 Received: from irsmsx108.ger.corp.intel.com ([169.254.11.167]) by IRSMSX102.ger.corp.intel.com ([169.254.2.248]) with mapi id 14.03.0248.002; Fri, 16 Sep 2016 02:43:46 +0100 From: "De Lara Guarch, Pablo" To: "Jain, Deepak K" , "dev@dpdk.org" Thread-Topic: [PATCH v3 1/2] crypto/qat: add NULL capability to Intel QAT driver Thread-Index: AQHSDZ0lxVutXtYjY06NJ6V4alMQ4qB7W7+g Date: Fri, 16 Sep 2016 01:43:45 +0000 Message-ID: References: <1473710451-24180-1-git-send-email-deepak.k.jain@intel.com> <1473757155-29941-1-git-send-email-deepak.k.jain@intel.com> <1473757155-29941-2-git-send-email-deepak.k.jain@intel.com> In-Reply-To: <1473757155-29941-2-git-send-email-deepak.k.jain@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiMTk4MTdkM2MtMTVkNC00YjhmLTk4NmItMWZkNDZjZjU2YTFhIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE1LjkuNi42IiwiVHJ1c3RlZExhYmVsSGFzaCI6InVcLzFjQkUzOWowU2xlaTdJMFdQQzE5U0EyUXFWbGdXMVBTRVJSZDlZaUNNPSJ9 x-ctpclassification: CTP_IC x-originating-ip: [163.33.239.182] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v3 1/2] crypto/qat: add NULL capability to Intel QAT driver X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 16 Sep 2016 01:43:49 -0000 Hi Deepak, > -----Original Message----- > From: Jain, Deepak K > Sent: Tuesday, September 13, 2016 1:59 AM > To: dev@dpdk.org > Cc: De Lara Guarch, Pablo; Jain, Deepak K > Subject: [PATCH v3 1/2] crypto/qat: add NULL capability to Intel QAT driv= er >=20 > From: Deepak Kumar JAIN >=20 > enabled NULL crypto for Intel(R) QuickAssist Technology >=20 > Signed-off-by: Deepak Kumar Jain > --- > doc/guides/cryptodevs/qat.rst | 3 +- > doc/guides/rel_notes/release_16_11.rst | 1 + > drivers/crypto/qat/qat_adf/qat_algs_build_desc.c | 2 ++ > drivers/crypto/qat/qat_crypto.c | 45 ++++++++++++++++++= ++++++ > 4 files changed, 50 insertions(+), 1 deletion(-) >=20 > diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.rs= t > index 78a734f..bb62f22 100644 > --- a/doc/guides/cryptodevs/qat.rst > +++ b/doc/guides/cryptodevs/qat.rst > @@ -49,6 +49,7 @@ Cipher algorithms: > * ``RTE_CRYPTO_SYM_CIPHER_AES256_CTR`` > * ``RTE_CRYPTO_SYM_CIPHER_SNOW3G_UEA2`` > * ``RTE_CRYPTO_CIPHER_AES_GCM`` > +* ``RTE_CRYPTO_CIPHER_NULL`` >=20 > Hash algorithms: >=20 > @@ -60,7 +61,7 @@ Hash algorithms: > * ``RTE_CRYPTO_AUTH_AES_XCBC_MAC`` > * ``RTE_CRYPTO_AUTH_SNOW3G_UIA2`` > * ``RTE_CRYPTO_AUTH_MD5_HMAC`` > - > +* ``RTE_CRYPTO_AUTH_NULL`` Extra blank line should remain here. >=20 > Limitations > ----------- ... > --- a/drivers/crypto/qat/qat_crypto.c > +++ b/drivers/crypto/qat/qat_crypto.c > @@ -346,6 +346,47 @@ static const struct rte_cryptodev_capabilities > qat_pmd_capabilities[] =3D { > }, } > }, } > }, > + { /* NULL (AUTH) */ > + .op =3D RTE_CRYPTO_OP_TYPE_SYMMETRIC, > + {.sym =3D { > + .xform_type =3D RTE_CRYPTO_SYM_XFORM_AUTH, > + {.auth =3D { > + .algo =3D RTE_CRYPTO_AUTH_NULL, > + .block_size =3D 1, > + .key_size =3D { > + .min =3D 0, > + .max =3D 0, > + .increment =3D 0 > + }, > + .digest_size =3D { > + .min =3D 0, > + .max =3D 0, > + .increment =3D 0 > + }, > + .aad_size =3D { 0 } > + }, }, > + }, }, > + }, > + { /* NULL (CIPHER) */ > + .op =3D RTE_CRYPTO_OP_TYPE_SYMMETRIC, > + {.sym =3D { > + .xform_type =3D RTE_CRYPTO_SYM_XFORM_CIPHER, > + {.cipher =3D { > + .algo =3D RTE_CRYPTO_CIPHER_NULL, > + .block_size =3D 1, > + .key_size =3D { > + .min =3D 0, > + .max =3D 0, > + .increment =3D 8 Increment should be 0, right? > + }, > + .iv_size =3D { > + .min =3D 0, > + .max =3D 0, > + .increment =3D 0 > + } > + }, }, > + }, } > + }, > RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST() > };