From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by dpdk.org (Postfix) with ESMTP id 7F8E64C96 for ; Tue, 19 Jun 2018 16:36:21 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 19 Jun 2018 07:36:18 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,243,1526367600"; d="scan'208";a="60465458" Received: from irsmsx151.ger.corp.intel.com ([163.33.192.59]) by orsmga003.jf.intel.com with ESMTP; 19 Jun 2018 07:36:14 -0700 Received: from irsmsx108.ger.corp.intel.com ([169.254.11.139]) by IRSMSX151.ger.corp.intel.com ([169.254.4.216]) with mapi id 14.03.0319.002; Tue, 19 Jun 2018 15:36:15 +0100 From: "De Lara Guarch, Pablo" To: Anoob Joseph , Akhil Goyal , Thomas Monjalon CC: Ankur Dwivedi , Jerin Jacob , Murthy NSSR , Narayana Prasad , "Nithin Dabilpuram" , Ragothaman Jayaraman , Srisivasubramanian Srinivasan , "dev@dpdk.org" Thread-Topic: [PATCH 04/16] crypto/cpt/base: add hardware enq/deq API for CPT Thread-Index: AQHT/0ia4M4OFJF1IESrkKdIpjkaiaRns+Sw Date: Tue, 19 Jun 2018 14:36:14 +0000 Message-ID: References: <1528476325-15585-1-git-send-email-anoob.joseph@caviumnetworks.com> <1528476325-15585-5-git-send-email-anoob.joseph@caviumnetworks.com> In-Reply-To: <1528476325-15585-5-git-send-email-anoob.joseph@caviumnetworks.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiYjY1OGE4YzctNjJmYi00M2U2LWIyYWQtZjAxZWM1NzE5MGMwIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiRHBRbWpIeUFHcEl2XC9qcjA3Zm0ycnhZN1dMUHZDT1o0bzRJRUVsbDZpMEtnVkhmRFhyRjYrUVZxYUd1bEFzcFEifQ== x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.0.200.100 dlp-reaction: no-action x-originating-ip: [163.33.239.181] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH 04/16] crypto/cpt/base: add hardware enq/deq API for CPT X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 19 Jun 2018 14:36:22 -0000 > -----Original Message----- > From: Anoob Joseph [mailto:anoob.joseph@caviumnetworks.com] > Sent: Friday, June 8, 2018 5:45 PM > To: Akhil Goyal ; De Lara Guarch, Pablo > ; Thomas Monjalon > Cc: Ankur Dwivedi ; Jerin Jacob > ; Murthy NSSR > ; Narayana Prasad > ; Nithin Dabilpuram > ; Ragothaman Jayaraman > ; Srisivasubramanian Srinivasan > ; dev@dpdk.org > Subject: [PATCH 04/16] crypto/cpt/base: add hardware enq/deq API for CPT No need to use "for CPT" here, as the "crypto/cpt/base" already states that= . Same applies in other patches. >=20 > From: Ankur Dwivedi >=20 > Adds hardware enqueue/dequeue API of instructions to a queue pair for Cav= ium > CPT device. >=20 > Signed-off-by: Ankur Dwivedi > Signed-off-by: Murthy NSSR > Signed-off-by: Nithin Dabilpuram > Signed-off-by: Ragothaman Jayaraman > > Signed-off-by: Srisivasubramanian Srinivasan > > --- > drivers/crypto/cpt/base/cpt.h | 102 +++++++ > drivers/crypto/cpt/base/cpt_device.c | 4 +- > drivers/crypto/cpt/base/cpt_request_mgr.c | 424 > ++++++++++++++++++++++++++++++ > drivers/crypto/cpt/base/cpt_request_mgr.h | 75 ++++++ > 4 files changed, 603 insertions(+), 2 deletions(-) create mode 100644 > drivers/crypto/cpt/base/cpt.h create mode 100644 > drivers/crypto/cpt/base/cpt_request_mgr.c > create mode 100644 drivers/crypto/cpt/base/cpt_request_mgr.h >=20 > diff --git a/drivers/crypto/cpt/base/cpt.h b/drivers/crypto/cpt/base/cpt.= h new > file mode 100644 index 0000000..11407ae > --- /dev/null > +++ b/drivers/crypto/cpt/base/cpt.h ... > +/* cpt instance */ > +struct cpt_instance { > + /* 0th cache line */ Is this comment useful for only 12 bytes of data? ... > diff --git a/drivers/crypto/cpt/base/cpt_device.c > b/drivers/crypto/cpt/base/cpt_device.c > index b7cd5b5..a50e5b8 100644 > --- a/drivers/crypto/cpt/base/cpt_device.c > +++ b/drivers/crypto/cpt/base/cpt_device.c > @@ -193,7 +193,7 @@ int cptvf_get_resource(struct cpt_vf *dev, > uint64_t *next_ptr; > uint64_t pg_sz =3D sysconf(_SC_PAGESIZE); >=20 > - PMD_DRV_LOG(DEBUG, "Initializing csp resource %s\n", cptvf- > >dev_name); > + PMD_DRV_LOG(DEBUG, "Initializing cpt resource %s\n", cptvf- > >dev_name); This should be "cpt resource" since the beginning, in the patch that introd= uced this line. Same below. >=20 > cpt_instance =3D &cptvf->instance; >=20 > @@ -323,7 +323,7 @@ int cptvf_put_resource(cpt_instance_t *instance) > return -EINVAL; > } >=20 > - PMD_DRV_LOG(DEBUG, "Releasing csp device %s\n", cptvf- > >dev_name); > + PMD_DRV_LOG(DEBUG, "Releasing cpt device %s\n", cptvf- > >dev_name); >=20 > rz =3D (struct rte_memzone *)instance->rsvd; > rte_memzone_free(rz); > diff --git a/drivers/crypto/cpt/base/cpt_request_mgr.c > b/drivers/crypto/cpt/base/cpt_request_mgr.c > new file mode 100644 > index 0000000..8b9b1ff > --- /dev/null > +++ b/drivers/crypto/cpt/base/cpt_request_mgr.c > @@ -0,0 +1,424 @@ > +/* SPDX-License-Identifier: BSD-3-Clause > + * Copyright(c) 2017 Cavium, Inc > + */ > + > +#include "cpt_request_mgr.h" > +#include "cpt_debug.h" > +#include Same comment about the includes applies here. Separate them with blank lines, between external and internal to DPDK inclu= des. > + > +#define MOD_INC(i, l) ((i) =3D=3D (l - 1) ? (i) =3D 0 : (i)++) > + > +#define __hot __attribute__((hot)) > + > +static inline uint64_t cpu_cycles(void) { > + return rte_get_timer_cycles(); > +} > + > +static inline uint64_t cpu_cycles_freq(void) { > + return rte_get_timer_hz(); > +} > + > +static inline void * > +get_cpt_inst(struct command_queue *cqueue, void *req) { > + (void)req; > + PMD_TX_LOG(DEBUG, "CPT queue idx %u, req %p\n", cqueue->idx, req); > + return &cqueue->qhead[cqueue->idx * CPT_INST_SIZE]; } > + > +static inline void > +mark_cpt_inst(struct cpt_vf *cptvf, > + struct command_queue *queue, > + uint32_t ring_door_bell) > +{ > +#ifdef CMD_DEBUG Try to avoid this compile time checks, as Jerin suggested. > + /* DEBUG */ > + {