From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by dpdk.org (Postfix) with ESMTP id 65CA25699 for ; Thu, 22 Jun 2017 11:35:22 +0200 (CEST) Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 22 Jun 2017 02:35:21 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.39,372,1493708400"; d="scan'208";a="277291475" Received: from irsmsx101.ger.corp.intel.com ([163.33.3.153]) by fmsmga004.fm.intel.com with ESMTP; 22 Jun 2017 02:35:20 -0700 Received: from irsmsx102.ger.corp.intel.com ([169.254.2.211]) by IRSMSX101.ger.corp.intel.com ([169.254.1.242]) with mapi id 14.03.0319.002; Thu, 22 Jun 2017 10:35:20 +0100 From: "Van Haaren, Harry" To: Martin Weiser , "rahul.lakkireddy@chelsio.com" CC: "dev@dpdk.org" Thread-Topic: [dpdk-dev] [PATCH v2] cxgbe: report 100G link speed capability for Chelsio T6 adapters Thread-Index: AQHS6zXDJ9g474xnakuA3cnZD0JrPKIwniOQ Date: Thu, 22 Jun 2017 09:35:19 +0000 Message-ID: References: <1498121851-33487-1-git-send-email-martin.weiser@allegro-packets.com> In-Reply-To: <1498121851-33487-1-git-send-email-martin.weiser@allegro-packets.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiZjgzMjNiZDQtZGU5Yi00MDQ4LThkYjMtN2MwMDUzZjY4N2Q1IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE2LjUuOS4zIiwiVHJ1c3RlZExhYmVsSGFzaCI6IjJ4WEN4d1wvVXZWNHVidExESGNXV0dnVEZ2WTlHUk9NQ2FHaSthYTFOMHZ3PSJ9 x-ctpclassification: CTP_IC dlp-product: dlpe-windows dlp-version: 10.0.102.7 dlp-reaction: no-action x-originating-ip: [163.33.239.181] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v2] cxgbe: report 100G link speed capability for Chelsio T6 adapters X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 22 Jun 2017 09:35:22 -0000 > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Martin Weiser > Sent: Thursday, June 22, 2017 9:58 AM > To: rahul.lakkireddy@chelsio.com > Cc: dev@dpdk.org; Martin Weiser > Subject: [dpdk-dev] [PATCH v2] cxgbe: report 100G link speed capability f= or Chelsio T6 > adapters >=20 > These adapters support 100G link speed but the speed_capa bitmask in the > device info did not reflect that. >=20 > Signed-off-by: Martin Weiser > --- > drivers/net/cxgbe/cxgbe_ethdev.c | 6 +++++- > 1 file changed, 5 insertions(+), 1 deletion(-) >=20 > diff --git a/drivers/net/cxgbe/cxgbe_ethdev.c b/drivers/net/cxgbe/cxgbe_e= thdev.c > index b622d25..b0d5ed7 100644 > --- a/drivers/net/cxgbe/cxgbe_ethdev.c > +++ b/drivers/net/cxgbe/cxgbe_ethdev.c > @@ -175,7 +175,11 @@ static void cxgbe_dev_info_get(struct rte_eth_dev *e= th_dev, >=20 > device_info->rx_desc_lim =3D cxgbe_desc_lim; > device_info->tx_desc_lim =3D cxgbe_desc_lim; > - device_info->speed_capa =3D ETH_LINK_SPEED_10G | ETH_LINK_SPEED_40G; > + if (CHELSIO_CHIP_VERSION(adapter->params.chip) =3D=3D CHELSIO_T6) > + device_info->speed_capa =3D ETH_LINK_SPEED_10G | ETH_LINK_SPEED_40G | > + ETH_LINK_SPEED_100G; > + else > + device_info->speed_capa =3D ETH_LINK_SPEED_10G | ETH_LINK_SPEED_40G; > } I think the following code is simpler and shows intent clearer? No objection to the patch above from me, just a suggestion :) device_info->speed_capa =3D ETH_LINK_SPEED_10G | ETH_LINK_SPEED_40G; if (CHELSIO_CHIP_VERSION(adapter->params.chip) =3D=3D CHELSIO_T6) device_info->speed_capa |=3D ETH_LINK_SPEED_100G;